8080.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 8080 데이타시트 다운로드

No Preview Available !

No Preview Available !

In December 1973 Intel shipped the first 8-bit, N-channel microprocessor,
the 8080. Since then it has become the most widely used microprocessor in
the industry. Applications of the 8080 span from large, intelligent systems
terminals to decompression computers for deep sea divers.
This 8080 Microcomputer Systems User's Manual presents all of the
8080 system components. Over twenty-five devices are described in detail.
These new devices further enhance the 8080 system:
8080A - 8-Bit Central Processor Unit
Functionally and Electrically Compatible with the 8080.
TTL Drive Capability.
Enhanced Timing.
8224 - Clock Generator for 8080A.
Single 16 Pin (DIP) Package.
Auxiliary Timing Functions.
Power-On Reset.
8228
- System Controller for 8080A.
Single 28 Pin (DIP) Package.
Single Interrupt Vector (RST 7) .
. Multi-Byte Interrupt Instruction Capability (e.g. CALL).
Direct Data and Control Bus Connect to all 8080 System. I/O
and Memory Components.
8251 - Programmable Communication Interface.
ASYNC or SYNC (including IBM bi·SYNC).
Single 28 Pin Package.
Single +5 Volt Power Supply.
8255 - Programmable Peripheral Interface.
Three 8-Bit Ports.
Bit Set/Reset Capability.
Interrupt Generation.
Single 40 Pin Package.
Single +5 Volt Power Supply.
In addition, new memory components include: 8708, 8K Erasable PROM;
8316A, High Density Mask ROM; and 5101, Low Power CMOS RAM.
intel® Microcomputers. First from the beginning.

No Preview Available !

CONTENTS
INTRODUCTION
General
.
Advantages of Designing with Microcomputers . .
Microcomputer Design Aids
Application Example . . . . . . . . . . . . . . . . . . .
Application Table .. . . . . . . . . . . . . . . . . . . .
ii
iii
iii
iv
CHAPTER 1-
THE FUNCTIONS OF A COMPUTER
A Typical Computer System
The Architecture of a CPU
Computer Operations. . . . . . . . . . . . . . . . . . .
1-1
1-1
1-3
CHAPTER 2-
THE 8080 CENTRAL PROCESSING UNIT
General . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Architectu.re of the 8080 CPU . . . . . . . . . . . ..
The Processor Cycle . . . . . . . . . . . . . . . . . . ..
Interrupt Sequences. . . . . . . . . . . . . . . . . . ..
Hold Sequences. . . . . . . . . . . . . . . . . . . . . ..
Halt Sequences . . . . . . . . . . . . . . . . . . . . . ..
Start-u p of the 8080 CPU . . . . . . . . . . . . . . ..
2-1
2-2
2-3
2-11
2-12
2-13
2-13
CHAPTER 3-
INTERFACING THE 8080
General . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Basic System Operation
CPU Module Design . . . . . . . . . . . . . . . . . . ..
Interfacing the 8080 to Memory and
I/O Devices
3-1
3-1
3-2
3-6
CHAPTER 4-
INSTRUCTION SET
General . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Data Transfer Group
Arithmetic Group . . . . . . . . . . . . . . . . . . . ..
Branch Group. . . . . . . . . . . . . . . . . . . . . . ..
Stack, I/O and Machine Control Group .. . . . ..
Summary Table. . . . . . . . . . . . . . . . . . . . . ..
4-1
4-4
4-6
4-11
4-13
4-15
CHAPTER 5-
8080 MICROCOMPUTER SYSTEM COMPONENTS
CPU Group
8224 Clock Generator
Functional Description and
System Applications
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8228 System Controller
Functional Description and
System Applications. . . . . . . . . . . . . . . . ..
Data Sheet. . . . . . . . . . . . . . . . . . . . . . ..
S080A Central Processor
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8080A-1 Central Processor (1.3,us)
Data Sheet. . . . . . . . . . . . . . . . . . . . . . ..
8080A-2 Central Processor (1.5,us)
Data Sheet. . . . . . . . . . . . . . . . . . . . . . ..
M80SOA Central Processor (-55° to +125°C)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
5-1
5-4
5-7
5-11
5-13
5-20
5-24
5-29
Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied.

No Preview Available !

ROMs
8702A Erasable PROM (256 x 8)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8708/8704 Erasable PROM (1 K x 8)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8302 Mask ROM (256 x 8)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8308 Mask ROM (1 K x 8)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8316A Mask ROM (2K x 8)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
RAMs
8101-2 Static RAM (256 x 4)
Data Sheet. . . . . . . . . . . . . . . . . . . . . . ..
8111-2 Static RAM (256 x 4)
Data Sheet . . . . . . . . . . . . . . . .. . . . . . ..
8102-2 Static RAM (1K x 1)
Data Sheet
8102A-4 Static RAM (1 K x 1)
0
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
81078-4 Dynamic RAM (4K x 1)
Data Sheet. . . . . . . . . . . . . . . . . . . . . . ..
5101 Static CMOS RAM (256 x 4)
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8210 Dynamic RAM Driver
Data Sheet . . . . . . . . . . . . . . . . . . . . . . ..
8222 Dynamic RAM Refresh Controller
New Product Announcement . . . . . . . . . . ..
5-37
5-45
5-51
5-59
5-61
5-67
5-71
5-75
5- 79
5-83
5-91
5-95
5-99
I/O
8212 8-Bit I/O Port
Functional Description
5-101
System Applications of the 8212
5-103
Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . 5-109
8255 Programmable Peripheral Interface
Basic Functional Description . . . . . . . . . . . . 5-113
Detailed Operationa-I Description
~ . . . 5-116
System Appl ications of the 8255
. . . . 5-127
Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . 5-1 30
8251 Programmable Communication Interface
Basic Functional Description . . . . . . . . . . . . 5-135
Detailed Operational Description
5-139
System Applications of the 8251
5-143
Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . 5-144
Peri pherals
8205 One of 8 Decoder
Functional Description
5-147
System Applications of the 8205
5-149
Data Sheet
5-151
8214 Priority Interrupt Control Unit
Interrupts jn Microcomputer Systems
5-153
Functional Description . . . . . . . . . . . . . . . . 5-155
System Appl ications of the 8214 .. . . . . . . . 5-1 57
Data Sheet
5-160
8216/8226 4-Bit Bi-Directional Bus Driver
Functional Description
5-163
System Applications of the 8216/8226
5-165
Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . 5-166
Coming Soon
8253 Programmable Interval Timer . . . . . . . . . . 5-169
8257 Programmable DMA Controller
5-171
8259 Programmable Interrupt Controller
5-173
CHAPTER 6-
PACKAGING INFORMATION. . . . • . . . . . . . . . . 6-1

No Preview Available !

Since their inception, digital computers have contin-
uously become more efficient, expanding into new appli-
cations with each major technological improvement. The
advent of minicomputers enabled the inclusion of digital
computers as a permanent part of various process control
systems. Unfortunately, the size and cost of minicomputers
in "dedicated" applications has limited their use. Another
approach has been the use of custom built systems made up
of "random logic" (i .e., logic gates, flip-flops, counters, etc.).
However, the huge expense and development time involved
in the design and debugging of these systems has restricted
their use to large volume applications where the develop-
ment costs could be spread over a large number of machines.
Today, Intel offers the systems designer a new alter-
native ... the microcomputer. Utilizing the technologies and
experience gained in becoming the world's largest supplier
of LSI memory components, Intel has made the power of
the digital computer available at the integrated circuit level.
Using the n-channel silicon gate MOS process, Intel engi-
neers have implemented the fast (2/ls. cycle) and powerful
(72 basic instructions) 8080 microprocessor on a single LSI
chip. When this processor is combined with memory and
I/O circuits, the computer is complete. Intel offers a variety
of random-access memory (RAM), read-only memory (ROM)
and shift register circu~ts, that combine with the 8080 pro-
cessor to form the MCS-80 microcomputer system, a system
that can directly address and retrieve as many as 65,536
bytes stored in the memory devices.
The 8080 processor is packaged in a 40-pin dual in-line
package (DIP) that allows for remarkably easy interfacing.
The 8080 has a 16-bit address bus, a 8-bit bidirectional data
bus and fully decoded, TTL-compatible control outputs. In
addition to supporting up to 64K bytes of mixed RAM and
ROM memory, the 8080 can address up to 256 input ports
and 256 output ports; thus allowing for virtually unlimited
system expansion. The 8080 instruction set includes con-
ditional branching, decimal as well as binary arithmetic,
logical, register-to-register, stack control and memory refer-
ence instructions. In fact, the 8080 instruction set is power-
ful enough to rival the performance of many of the much
higher priced minicomputers, yet the 8080 is upward soft-
ware compatible with Intel's earlier 8008 microprocessor
(Le., programs written for the 8008 can be assembled and
executed on the 8080).
In addition to an extensive instruction set oriented to
problem solving, the 8080 has another significant feature-
SPEED. In contrast to random logic designs which tend to
work in parallel, the microcomputer works by sequentially
executing its program. As a result of this sequential execu-
tion, the number of tasks a microcomputer can undertake
in a given period of time is directly proportional to the
execution speed of the microcomputer. The speed of exe-
cution is the limiting factor of the realm of applications of
the microcomputer. The 8080, with instruction times as
short as 2 /lsec., is an order of magnitude faster than earlier
generations of microcomputers, and therefore has an ex-
panded field of potential applications.
The architecture of the 8080 also shows a significant
improvement over earlier microcomputer designs. The 8080
contains a 16-bit stack pointer that controls the addressing
of an external stack located in memory. The pointer can be
initialized via the proper instructions such that any portion
of external memory can be used as a last in/first out stack;
thus enabling almost unlimited subroutine nesting. The stack
pointer allows the contents of the program counter, the ac-
cumulator, the condition flags or any of the data registers to
be stored in or retrieved from the external stack. In addi-
tion, multi-level interrupt processing is possible using the
8080's stack control instructions. The status of the pro-
cessor can be "pushed" onto the stack when an interrupt is
accepted, then "popped" off the stack after the interrupt has
been serviced. This ability to save the contents of the pro-
cessor's registers is possible even if an interrupt service
routine, itself, is interrupted.