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DATASHEET
ISL6377
Multiphase PWM Regulator for AMD Fusion Desktop CPUs Using SVI 2.0
FN8336
Rev 1.00
Nov 2, 2015
The ISL6377 is fully compliant with AMD Fusion™ SVI 2.0 and
provides a complete solution for microprocessor and graphics
processor core power. The ISL6377 controller supports two
Voltage Regulators (VRs) with three integrated gate drivers and
three optional external drivers for maximum flexibility. The Core
VR can be configured for 4-, 3-, 2-, or 1-phase operation while the
Northbridge VR supports 2- or 1-phase configurations. The two
VRs share a serial control bus to communicate with the AMD CPU
and achieve lower cost and smaller board area compared with
two-chip solutions.
The PWM modulator is based on Intersil’s Robust Ripple
Regulator R3™ technology. Compared to traditional modulators,
the R3 modulator can automatically change switching frequency
for faster transient settling time during load transients and
improved light-load efficiency.
The ISL6377 has several other key features. Both outputs
support DCR current sensing with single NTC thermistor for
DCR temperature compensation or accurate resistor current
sensing. Both outputs utilize remote voltage sense, adjustable
switching frequency, OC protection and power-good.
Applications
• AMD fusion CPU/GPU core power
• Desktop computers
Features
• Supports AMD SVI 2.0 serial data bus interface
- Serial VID clock frequency range 100kHz to 25MHz
• Dual output controller with integrated drivers
- Two dedicated core drivers
- One programmable driver for either core or Northbridge
• Precision voltage regulation
- 0.5% system accuracy over-temperature
- 0.5V to 1.55V in 6.25mV steps
- Enhanced load line accuracy
• Supports multiple current sensing methods
- Lossless inductor DCR current sensing
- Precision resistor current sensing
• Programmable 1-, 2-, 3- or 4-phase for the core output and
1- or 2-phase for the Northbridge output
• Adaptive body diode conduction time reduction
• Superior noise immunity and transient response
• Output current and voltage telemetry
• Differential remote voltage sensing
• High efficiency across entire load range
• Programmable slew rate
• Programmable VID offset and droop on both outputs
• Programmable switching frequency for both outputs
• Excellent dynamic current balance between phases
• Protection: OCP/WOC, OVP, PGOOD and thermal monitor
• Small footprint 48 Ld 6x6 QFN package
- Pb-free (RoHS compliant)
Core Performance
100
90
80
70
60
50
40
30
20
10
0
0
VIN = 12V
VIN = 8V
VOUT CORE = 1.1V
5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
FIGURE 1. EFFICIENCY vs LOAD
1.12
1.10
1.08
1.06
1.04
1.02
VIN = 12V
VIN = 8V
1.00
0.98 VOUT CORE = 1.1V
0.96 0 5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
FIGURE 2. VOUT vs LOAD
FN8336 Rev 1.00
Nov 2, 2015
Page 1 of 37

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ISL6377
Table of Contents
Simplified Application Circuit for High Power CPU Core . . . 3
Simplified Application Circuit with 3 Internal Drivers Used
for Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Simplified Application Circuit for Mid-Power CPUs
[3+1 Configuration] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . .10
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Recommended Operating Conditions . . . . . . . . . . . . . . . . .10
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Gate Driver Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . .12
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Multiphase R3™ Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Diode Emulation and Period Stretching . . . . . . . . . . . . . . . . . 14
Channel Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Start-Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Voltage Regulation and Load Line Implementation . . . . . . . 15
Differential Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Phase Current Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Dynamic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Adaptive Body Diode Conduction Time Reduction . . . . . . . . 19
Resistor Configuration Options. . . . . . . . . . . . . . . . . . . . . . .19
VR Offset Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Floating DriverX and PWM_Y Configuration. . . . . . . . . . . . . . 19
VID-on-the-Fly Slew Rate Selection . . . . . . . . . . . . . . . . . . . . . 20
CCM Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
AMD Serial VID Interface 2.0 . . . . . . . . . . . . . . . . . . . . . . . . 20
Pre-PWROK Metal VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SVI Interface Active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
VID-on-the-Fly Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SVI Data Communication Protocol . . . . . . . . . . . . . . . . . . . . . 21
SVI Bus Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Dynamic Load Line Slope Trim . . . . . . . . . . . . . . . . . . . . . . . . 25
Dynamic Offset Trim. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Telemetry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Overcurrent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Current Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Thermal Monitor [NTC, NTC_NB]. . . . . . . . . . . . . . . . . . . . . . . 26
Fault Recovery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Interface Pin Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Key Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Inductor DCR Current-Sensing Network . . . . . . . . . . . . . . . . 27
Resistor Current-Sensing Network . . . . . . . . . . . . . . . . . . . . . 29
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Load Line Slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Compensator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Current Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Thermal Monitor Component Selection . . . . . . . . . . . . . . . . . 31
Layout Guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PCB Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
About Intersil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
FN8336 Rev 1.00
Nov 2, 2015
Page 2 of 37

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ISL6377
Simplified Application Circuit for High Power CPU Core
NB_PH1
NB_PH2
VNB1
VNB2
NB_PH1
NB_PH2
Ri
Cn
NTC
ISEN1_NB
ISEN2_NB
ISUMN_NB
ISUMP_NB
COMP_NB
BOOTX
UGATEX
PHASEX
LGATEX
FCCM_NB
**
*OPTIONAL
VNB_SENSE
THERMAL INDICATOR
µP
FB_NB
VSEN_NB
PWM2_NB
IMON_NB
NTC_NB
VR_HOT_L
PWROK
SVT
SVD
SVC
VDDIO
IMON
NTC
COMP
ISL6377
PWM4
PWM_Y
**
*OPTIONAL
VCORE_SENSE
PH1
PH2
PH3
PH4
VO1
VO2
VO3
VO4
Ri
Cn
NTC
FB
VSEN
RTN
ISEN1
ISEN2
ISEN3
ISEN4
ISUMN
ISUMP
BOOT2
UGATE2
PHASE2
LGATE2
BOOT1
UGATE1
PHASE1
LGATE1
+12V
NB_PH1
+12V
VNB1
VNB
NB_PH2
VNB2
+12V
PH4
+12V
VO4
PH3
+12V
VO3
VCORE
PH2
+12V
VO2
PH1
VO1
FN8336 Rev 1.00
Nov 2, 2015
FIGURE 3. TYPICAL APPLICATION CIRCUIT USING INDUCTOR DCR SENSING
Page 3 of 37

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ISL6377
Simplified Application Circuit with 3 Internal Drivers Used for Core
+12V
NB_PH1
NB_PH2
VNB1
VNB2
NB_PH1
NB_PH2
Ri
Cn NTC
**
*OPTIONAL
VNB_SENSE
THERMAL INDICATOR
µP
ISEN1_NB
ISEN2_NB
ISUMN_NB
ISUMP_NB
PWM_Y
FCCM_NB
COMP_NB
FB_NB
VSEN_NB
PWM2_NB
IMON_NB
NTC_NB
VR_HOT_L
PWROK
SVT
SVD
SVC
VDDIO
IMON
NTC
COMP
ISL6377
PWM4
BOOTX
UGATEX
PHASEX
LGATEX
NB_PH1
VNB
VNB1
+12V
NB_PH2
VNB2
+12V
PH4
+12V
V04
PH3
V03
**
*OPTIONAL
VCORE_SENSE
PH1
PH2
PH3
PH4
VO1
VO2
VO3
VO4
Ri
Cn
NTC
FB
VSEN
RTN
ISEN1
ISEN2
ISEN3
ISEN4
ISUMN
ISUMP
BOOT2
UGATE2
PHASE2
LGATE2
BOOT1
UGATE1
PHASE1
LGATE1
+12V
VCORE
PH2
+12V
VO2
PH1
VO1
FN8336 Rev 1.00
Nov 2, 2015
FIGURE 4. TYPICAL APPLICATION CIRCUIT USING INDUCTOR DCR SENSING
Page 4 of 37

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ISL6377
Simplified Application Circuit for Mid-Power CPUs [3+1 Configuration]
* Resistor required or ISEN1_NB
will pull HIGH if left open and
disable Channel 1.
10kΩ*
NBN
NBP
+5V
Ri
NTC
Cn
ISEN1_NB
ISEN2_NB
ISUMN_NB
ISUMP_NB
COMP_NB
PWM_Y
FCCM_NB
PWM2_NB
IMON_NB
OPEN
NTC_NB
+12V
VNB
NBP NBN
**
*OPTIONAL
VNB_SENSE
FB_NB
VSEN_NB
VR_HOT_L
IMON
NTC
THERMAL INDICATOR
**
*OPTIONAL
VCORE_SENSE
VP1
VP2
VP3
VN1
VN2
VN3
µP
+5V
Ri
Cn
NTC
PWROK
SVT
SVD
SVC
VDDIO
COMP
ISL6377
PWM4
BOOTX
UGATEX
PHASEX
LGATEX
OPEN
FB
VSEN
RTN
ISEN1
ISEN2
ISEN3
ISEN4
ISUMN
ISUMP
BOOT2
UGATE2
PHASE2
LGATE2
BOOT1
UGATE1
PHASE1
LGATE1
+12V
VP3 VN3
+12V
VP2 VN2
+12V
VCORE
VP1 VN1
FN8336 Rev 1.00
Nov 2, 2015
FIGURE 5. TYPICAL APPLICATION CIRCUIT USING RESISTOR SENSING
Page 5 of 37