ISL6617A.pdf 데이터시트 (총 16 페이지) - 파일 다운로드 ISL6617A 데이타시트 다운로드

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DATASHEET
ISL6617A
PWM Doubler with Output Monitoring Feature
The ISL6617A uses Intersil’s proprietary Phase Doubler
scheme to modulate two-phase power trains with single PWM
input. It doubles the number of phases that 3.3V multiphase
controllers can support.
The ISL6617A is designed to minimize the number of analog
signals that interface between the controller and drivers in
high phase count scalable applications. The common COMP
signal, which is usually seen in conventional cascaded
configurations, is not required; this improves noise immunity
and simplifies the layout. Furthermore, the ISL6617A provides
low part count and low cost advantage over the conventional
cascaded technique.
By cascading the ISL6617A with another ISL6617 or
ISL6611A, it can quadruple the number of phases that 3.3V
multiphase controllers can support.
The ISL6617A also features tri-state inputs and outputs that
recognize a high-impedance state, working together with
Intersil multiphase PWM controllers and driver stages to
prevent negative transients on the controlled output voltage
when operation is suspended. This feature eliminates the need
for the Schottky diode that may be utilized in a power system
to protect the load from excessive negative output voltage
damage.
Applications
• High current, low voltage DC/DC converters
• High frequency and high efficiency VRM and VRD
• High phase count and phase shedding applications
• 3.3V PWM input integrated power stage or DrMOS
FN7844
Rev.2.00
Jun 9, 2017
Features
• Proprietary phase doubler scheme
• Enhanced light- to full-load efficiency
• Double or quadruple phase count
• Patented current balancing with DCR current sensing and
adjustable gain
• Current monitoring output (IOUT) to simplify system interface
and layout
• Triple-level enable input for mode selection
• Dual PWM output drives for two synchronous rectified
bridges with single PWM input
• Channel synchronization and two interleaving options
• Support 3.3V PWM input
• Support 5V PWM output
• Compatible with DCR sensing or smart power stage sensing
• Tri-state PWM input and outputs for output stage shutdown
• Overvoltage protection
• Dual Flat No-lead (DFN) package
- Near chip-scale package footprint; improves PCB
utilization, thinner profile
- Pb-free (RoHS compliant)
Related Literature
• For a full list of related documents, visit our website
- ISL6617A product page
Phase Doubler Selection Guide
PART
NUMBER
ISL6617A
ISL6617
ISL6611A
PWM
INPUT
3.3V
5.0V
5V
PWM
OUTPUT
5.0V
5.0V
N/A
INTEGRATED
DRIVER
CASCADED DEVICES
COMPATIBLE CONTROLLERS
N/A 5.0V PWM DrMOS/SPS; 3.3V PWM digital controllers with phase doubler compatibility;
ISL6617, ISL6611A
ISL691x7, ISL691x4, ISL691x8, ISL681x7, ISL681x4, and
ISL99227B
ISL6388/98 with 3.3V PWM option
N/A 5.0V PWM DrMOS/SPS;
ISL6617, ISL6611A,
ISL99227B
ISL6388/98 with 3.3V or 5V PWM option
5.0V
Discrete MOSFET; Dual FETs
FN7844 Rev.2.00
Jun 9, 2017
Page 1 of 16

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ISL6617A
Internal Block Diagram
VCC
PWMIN
EN_SYNC
GND
10k
5.5k
CONTROL
LOGIC
IOUT
CURRENT
BALANCE BLOCK
CSENA
CSRTNA CHANNEL A
PWMA
PWMB
CSENB
CSRTNB
CHANNEL B
FIGURE 1. BLOCK DIAGRAM
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS COMPLIANT)
PKG.
DWG. #
ISL6617AFRZ
17AF
-40 to +125
10 Ld 3x3 DFN
L10.3x3
NOTES:
1. Add “-T” suffix for 6k unit tape and reel option. Refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see product information page for ISL6617A. For information on MSL see techbrief TB363.
FN7844 Rev.2.00
Jun 9, 2017
Page 2 of 16

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ISL6617A
Pin Configuration
ISL6617A
(10 LD DFN)
TOP VIEW
CSRTNA 1
CSENA 2
PWMIN 3
CSRTNB 4
CSENB 5
11
GND
10 PWMA
9 VCC
8 IOUT
7 EN_SYNC
6 PWMB
Functional Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
9
10
11
PIN SYMBOL
CSRTNA
CSENA
PWMIN
CSRTNB
CSENB
PWMB
EN_SYNC
IOUT
VCC
PWMA
GND
FUNCTION
Output of the differential amplifier for Channel A. Connect a resistor on this pin to the negative rail of the sensed voltage to
set the current gain.
Input of the differential amplifier for Channel A. Typically, the positive rail of sensed voltage via DCR sensing network
connects to this node.
The PWM input signal (3.3V) triggers the J-K flip flop and alternates its input to Channel A and B. Both channels are
effectively modulated. The PWM signal can enter three distinct states during operation; see “Operation” on page 9 for
further details. Connect this pin to the PWM output of the controller.
Output of the differential amplifier for Channel B. Connect a resistor on this pin to the negative rail of the sensed voltage to
set the current gain.
Input of the differential amplifier for Channel B. Typically, the positive rail of sensed voltage via DCR sensing network
connects to this node.
PWM output of Channel B with 5V PWM tri-state compatibility.
Driver enable and mode selection input. See “EN_SYNC Operation” on page 9 for more details.
Current monitoring output. It sources out the average current of both Channel A and B.
Connect this pin to a +5V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR ceramic
capacitor from this pin to GND.
PWM output of Channel A with 5V PWM tri-state compatibility.
Bias and reference ground. All signals are referenced to this node. Place a high quality low ESR ceramic capacitor from this
pin to VCC. Connect this pad to the power ground plane (GND) via thermally enhanced connection.
FN7844 Rev.2.00
Jun 9, 2017
Page 3 of 16

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ISL6617A
Typical Application I (Coupled with Smart Power Stage Sensing)
VCCS
+3.3V 5V
SYNC
VCCS VCC
VSENVCORE
RGNDVCORE
ISL69158
SYNC ISL6617A
EN_SYNC PWMA
CSENA
PWM1
PWM
CSRTNA
CSRTNB
CSENB
IOUT
PWMB
CS1
CSRTN1
TEMPVCORE
ENVCORE
PWM2-5
CS2-5
CSRTN2-5
SYNC ISL6617A
EN_SYNC PWMA
CSENA
PWM6
PWM
CSRTNA
CSRTNB
CSENB
IOUT
PWMB
CS6
CSRTN6
VCCS
ISL99227B
5V VCC
PVCC 5V
5V LGCTRL VIN VIN
PWM
BOOT
IMON PHASE
REFIN
SW
TMON
FAULT# GND
ISL99227B
5V VCC
PVCC 5V
5V LGCTRL VIN VIN
PWM
IMON
REFIN
BOOT
PHASE
SW
TMON
FAULT# GND
N
Phases
ISL99227B
5V VCC
PVCC
5V LGCTRL VIN
PWM
BOOT
IMON PHASE
REFIN
SW
TMON
FAULT# GND
5V
VIN
ISL99227B
5V VCC
PVCC
5V LGCTRL VIN
PWM
BOOT
IMON
REFIN
PHASE
SW
TMON
FAULT# GND
5V
VIN
LOAD
FIGURE 2. TYPICAL APPLICATION I
FN7844 Rev.2.00
Jun 9, 2017
Page 4 of 16

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ISL6617A
Typical Application II (2-Phase Controller for 4-Phase Operation)
+3.3V
VSEN
VCC
VR_RDY
EN
PWM0
CS0
CSRTN0
+5V
+5V
VCC
PWMA
EN_SYNC
+12V
POWER STAGE
VIN
PWM PHASE
GND
CSENA
PWMIN
CSRTNA
CSRTNB
CSENB
ISL6617A
IOUT
PWMB
GND
+12V POWER
STAGE
VIN
PWM PHASE
GND
+VCORE
MAIN
CONTROL
ISL69xxx
PWM1
CS1
CSRTN1
GND
+5V
+5V
VCC
PWMA
EN_SYNC
+12V
POWER STAGE
VIN
PWM PHASE
GND
CSENA
PWMIN
CSRTNA
CSRTNB
CSENB
ISL6617A
IOUT
PWMB
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
FIGURE 3. TYPICAL APPLICATION II
FN7844 Rev.2.00
Jun 9, 2017
Page 5 of 16