ISL6614.pdf 데이터시트 (총 12 페이지) - 파일 다운로드 ISL6614 데이타시트 다운로드

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DATASHEET
ISL6614
Dual Advanced Synchronous Rectified Buck MOSFET Drivers with Protection
Features
FN9155
Rev.5.00
May 5, 2008
The ISL6614 integrates two ISL6613 MOSFET drivers and is
specifically designed to drive two independent power
channels in a Multi-Phase interleaved buck converter
topology. These drivers combined with HIP63xx or ISL65xx
Multi-Phase Buck PWM controllers and N-Channel
MOSFETs form complete core-voltage regulator solutions for
advanced microprocessors.
The ISL6614 drives both the upper and lower gates
simultaneously over a range from 5V to 12V. This drive
voltage provides the flexibility necessary to optimize
applications involving trade-offs between gate charge and
conduction losses.
An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs
from conducting simultaneously and to minimize the dead
time. These products add an overvoltage protection feature
operational before VCC exceeds its turn-on threshold, at
which the PHASE node is connected to the gate of the low
side MOSFET (LGATE). The output voltage of the converter
is then limited by the threshold of the low side MOSFET,
which provides some protection to the microprocessor if the
upper MOSFET(s) is shorted during startup. The over-
temperature protection feature prevents failures resulting
from excessive power dissipation by shutting off the outputs
when its junction temperature exceeds +150°C (typically).
The driver resets once its junction temperature returns to
+108°C (typically).
The ISL6614 also features a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.
Features
• Pin-to-pin Compatible with HIP6602 SOIC Family for
Better Performance and Extra Protection Features
• Quad N-Channel MOSFET Drives for Two Synchronous
Rectified Bridges
• Advanced Adaptive Zero Shoot-Through Protection
- Body Diode Detection
- Auto-zero of rDS(ON) Conduction Offset Effect
• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency
• Internal Bootstrap Schottky Diode
• Bootstrap Capacitor Overcharging Prevention
• Supports High Switching Frequency (up to 1MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Three-State PWM Input for Output Stage Shutdown
• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
• Pre-POR Overvoltage +Protection
• VCC Undervoltage Protection
• Over-Temperature Protection (OTP) with +42°C Hysteresis
• Expandable Bottom Copper Pad for Enhanced Heat Sinking
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves
PCB Efficiency and has a Thinner Profile
• Pb-free Available (RoHS compliant)
Applications
• Core Regulators for Intel® and AMD® Microprocessors
• High Current DC/DC Converters
• High Frequency and High Efficiency VRM and VRD
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief 400 and 417 for Power Train Design,
Layout Guidelines, and Feedback Compensation Design
FN9155 Rev.5.00
May 5, 2008
Page 1 of 12

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ISL6614
ISL6614CB, ISL6614CBZ, ISL6614IB
(14 LD SOIC)
TOP VIEW
PWM1 1
PWM2 2
GND 3
LGATE1 4
PVCC 5
PGND 6
LGATE2 7
14 VCC
13 PHASE1
12 UGATE1
11 BOOT1
10 BOOT2
9 UGATE2
8 PHASE2
ISL6614CR, ISL6614CRZ, ISL6614IR, ISL6614IRZ
(16 LD QFN)
TOP VIEW
16 15 14 13
GND 1
LGATE1 2
PVCC 3
PGND 4
GND
12 UGATE1
11 BOOT1
10 BOOT2
9 UGATE2
5678
Ordering Information
PART NUMBER
PART MARKING
TEMP. RANGE (°C)
PACKAGE
PKG. DWG. #
ISL6614CB*
ISL6614CB
0 to +85
14 Ld SOIC
M14.15
ISL6614CBZ* (Note)
6614CBZ
0 to +85
14 Ld SOIC (Pb-free)
M14.15
ISL6614CBZA* (Note)
6614CBZ
0 to +85
14 Ld SOIC (Pb-free)
M14.15
ISL6614CR*
ISL 6614CR
0 to +85
16 Ld 4x4 QFN
L16.4x4
ISL6614CRZ* (Note)
66 14CRZ
0 to +85
16 Ld 4x4 QFN (Pb-free)
L16.4x4
ISL6614CRZA* (Note)
66 14CRZ
0 to +85
16 Ld 4x4 QFN (Pb-free)
L16.4x4
ISL6614IB*
ISL6614IB
-40 to +85
14 Ld SOIC
M14.15
ISL6614IBZ* (Note)
6614IBZ
-40 to +85
14 Ld SOIC (Pb-free)
M14.15
ISL6614IR*
ISL 6614IR
-40 to +85
16 Ld 4x4 QFN
L16.4x4
ISL6614IRZ* (Note)
66 14IRZ
-40 to +85
16 Ld 4x4 QFN (Pb-free)
L16.4x4
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
FN9155 Rev.5.00
May 5, 2008
Page 2 of 12

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ISL6614
Block Diagram
VCC
+5V
10k
PVCC
OTP AND
PRE-POR OVP
FEATURES
PWM1
8k
SHOOT-
THROUGH
PROTECTION
PVCC
CONTROL
+5V LOGIC
10k
PWM2
GND
8k
PGND
PVCC
SHOOT-
THROUGH
PROTECTION
BOOT1
UGATE1
PHASE1
CHANNEL 1
LGATE1
PGND
BOOT2
UGATE2
PHASE2
PVCC
CHANNEL 2
PAD
LGATE2
PGND
FOR ISL6614CR, THE PAD ON THE BOTTOM SIDE OF
THE QFN PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.
FN9155 Rev.5.00
May 5, 2008
Page 3 of 12

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ISL6614
Typical Application - 4 Channel Converter Using ISL65xx and ISL6614 Gate Drivers
+12V
VCC
BOOT1
UGATE1
PHASE1
+12V
PGOOD
EN
VID
+5V
FB COMP
VSEN
VCC
ISEN1
PWM1
PWM2
MAIN ISEN2
CONTROL
ISL65xx
LGATE1
DUAL
DRIVER
ISL6614
PVCC
5V TO 12V
BOOT2
+12V
PWM1
PWM2
GND
UGATE2
PHASE2
LGATE2
PGND
FS/DIS
ISEN3
PWM3
PWM4
GND ISEN4
+12V
VCC
BOOT1
UGATE1
PHASE1
+12V
LGATE1
DUAL
DRIVER
ISL6614
PVCC
5V TO 12V
BOOT2
+12V
PWM1
PWM2
UGATE2
PHASE2
LGATE2
GND
PGND
+VCORE
FN9155 Rev.5.00
May 5, 2008
Page 4 of 12

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ISL6614
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
BOOT Voltage (VBOOT-GND). . . . . . . . . . . . . . . . . . . . . . . . . . . .36V
Input Voltage (VPWM) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
UGATE. . . . . . . . . . . . . . . . . . . VPHASE - 0.3VDC to VBOOT + 0.3V
VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . GND - 0.3VDC to VPVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to VPVCC + 0.3V
PHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3VDC to 15VDC
GND - 8V (<400ns, 20µJ) to 30V (<200ns, VBOOT-GND <36V)
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance (Typical) . . . . . . . . . . JA(°C/W) JC(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . .
90
N/A
QFN Package (Notes 2, 3). . . . . . . . . .
44
4.5
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Operating Junction Temperature. . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V 10%
Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . 5V to 12V 10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air.
2. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Bias Supply Current
Gate Drive Bias Current
POWER-ON RESET AND ENABLE
IVCC
IPVCC
fPWM = 300kHz, VPVCC = 12V
fPWM = 300kHz, VPVCC = 12V
- 7.1 - mA
- 9.7 - mA
VCC Rising Threshold
0°C to +85°C
9.35 9.80 10.05
V
-40°C to +85°C
8.35 - 10.05 V
VCC Falling Threshold
0°C to +85°C
7.35 7.60 8.00
V
-40°C to +85°C
6.35 - 8.00 V
PWM INPUT (See “TIMING DIAGRAM” on page 8)
Input Current
PWM Rising Threshold
PWM Falling Threshold
Typical Three-State Shutdown Window
Three-State Lower Gate Falling Threshold
Three-State Lower Gate Rising Threshold
Three-State Upper Gate Rising Threshold
Three-State Upper Gate Falling Threshold
Shutdown Hold-off Time
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
UGATE Turn-On Propagation Delay (Note 4)
IPWM
tTSSHD
tRU
tRL
tFU
tFL
tPDHU
VPWM = 5V
VPWM = 0V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VCC = 12V
VPVCC = 12V, 3nF Load, 10% to 90%
VPVCC = 12V, 3nF Load, 10% to 90%
VPVCC = 12V, 3nF Load, 90% to 10%
VPVCC = 12V, 3nF Load, 90% to 10%
VPVCC = 12V, 3nF Load, Adaptive
-
-
-
-
1.80
-
-
-
-
-
-
-
-
-
-
450
-400
3.00
2.00
-
1.50
1.00
3.20
2.60
245
26
18
18
12
10
-
-
-
-
2.40
-
-
-
-
-
-
-
-
-
-
µA
µA
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
FN9155 Rev.5.00
May 5, 2008
Page 5 of 12