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InnoSwitch-EP Family
Off-Line CV/CC Flyback Switcher IC with Integrated 725 V / 900 V MOSFET,
Sync-Rect Feedback with Advanced Protection
Product Highlights
Highly Integrated, Compact Footprint
Incorporates flyback controller, 725 V / 900 V MOSFET, secondary-
side sensing and synchronous rectification driver
FluxLink™ integrated, HIPOT-isolated, feedback link
Exceptional CV accuracy, independent of transformer design or
external components
Excellent multi-output cross regulation with weighted SSR feedback
and synch FETs
EcoSmart– Energy Efficient
<10 mW no-load at 230 VAC when supplied by transformer bias
winding
Easily meets all global energy efficiency regulations
Advanced Protection / Safety Features
Primary sensed output OVP
Secondary sensed output overshoot clamp
Secondary sensed output OCP to zero output voltage
Hysteretic thermal shutdown
Input voltage monitor with accurate brown-in/brown-out and
overvoltage protection
Full Safety and Regulatory Compliance
100% production HIPOT compliance testing equivalent to
4.8 kV AC for 1 second
Reinforced insulation
Isolation voltage 3,500 VAC for INN26xx series, 4,000 VAC
for INN2904
UL1577 and TUV (EN60950) safety approved
EN61000-4-8 (100 A/m) and EN61000-4-9 (1000 A/m) compliant
Green Package
Halogen free and RoHS compliant
Applications
Appliance, industrial, utility meter, smart grid, solar inverters and
smart lighting
Description
The InnoSwitch-EP family of ICs dramatically simplify the development
and manufacturing of low-voltage, high current power supplies,
particularly those in compact enclosures or with high efficiency require-
ments. The InnoSwitch-EP architecture is revolutionary in that the
devices incorporate both primary and secondary controllers, with sense
elements and a safety-rated feedback mechanism into a single IC.
Close component proximity and innovative use of the integrated
communication link permit accurate control of a secondary-side
synchronous rectification MOSFET and optimization of primary-side
switching to maintain high efficiency across the entire load range.
Additionally, the minimal DC bias requirements of the link, enable the
system to achieve less than 10 mW no-load to maximize efficiency in
standby.
SR FET
D
InnoSwitch-EP
Primary FET
and Controller
S
V
BPP
Figure 1. Typical Application/Performance.
VOUT
IS
Secondary
Control IC
Optional
Current
Sense
PI-7690-0011216
Figure 2. High Creepage, Safety-Compliant eSOP-R16B Package.
Output Power Table
Product 3
Peak or Open Frame1,2
725 V MOSFET
230 VAC ±15%
85-265 VAC
INN2603K
INN2604K
INN2605K
24 W
27 W
35 W
15 W
20 W
25 W
Product 3
900 V MOSFET
230 VAC ±15%
85-484 VAC
INN2904K
29 W
20 W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical non-ventilated enclosed typical size
adapter measured at 40 °C ambient. Max output power is dependent on the
design. With condition that package temperature must be < = 125 °C.
2. Minimum peak power capability.
3. Package: eSOP-R16B.
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This Product is Covered by Patents and/or Pending Patent Applications.
September 2017

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InnoSwitch-EP
PRIMARY BYPASS
(BPP)
INPUT VOLTAGE
MONITOR (V)
LINE-SENSE
UV
OV
FAULT
PRESENT
AUTO-
RESTART
COUNTER
RESET
FROM
FEEDBACK
DRIVER
PRI/SEC
RECEIVER
CONTROLLER
PULSE
DCMAXS
6.4 V
20
JITTER
CLOCK
DCMAX
OSCILLATOR
OVP
LATCH
Figure 3. Primary-Side Controller Block Diagram.
OUTPUT
VOLTAGE
(VO)
REGULATOR
4.45 V
SCONDARY
BYPASS
(BPS)
FEEDBACK
(FB)
ISENSE
(IS)
SYNC RECT
(SR)
4.45 V
3.80 V
+
-
+
-
FB THRESHOLD
+
-
IS THRESHOLD
ENB
CONTROL
CLOCK
OSCILLATOR
QS
QR
Figure 4. Secondary-Side Controller Block Diagram.
2
Rev. G 09/17
REGULATOR
5.95 V
+
BYPASS
CAPACITOR
SELECT AND
CURRENT
5.95 V
5.39 V
-
LIMIT STATE
MACHINE
BYPASS PIN
UNDERVOLTAGE
VILIMIT
CURRENT LIMIT
COMPARATOR
-
+
THERMAL
SHUTDOWN
DRAIN
(D)
SQ
RQ
LEADING
EDGE
BLANKING
PI-7453-121114
SOURCE
(S)
DETECTOR
HAND SHAKE
PULSES
FORWARD
(FWD)
FEEDBACK
DRIVER
TO
RECEIVER
ENABLE
SR
+
- SR
THESHOLD
SECONDARY
GROUND
(GND)
PI-7647-032116
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InnoSwitch-EP
Pin Functional Description
DRAIN (D) Pin (Pin 1)
This pin is the power MOSFET drain connection.
SOURCE (S) Pin (Pin 3-6)
This pin is the power MOSFET source connection. It is also the
ground reference for the PRIMARY BYPASS pin.
PRIMARY BYPASS (BPP) Pin (Pin 7)
It is the connection point for an external bypass capacitor for the
primary-side controller IC supply.
INPUT VOLTAGE MONITOR (V) Pin (Pin 8)
AA 8 MW resistor is tied between the pin and the input bulk capacitor
to provide input under and overvoltage protection. This pin should
be tied to the PRIMARY BYPASS pin if line UV/OV functionality is not
required.
NO CONNECTION (NC) Pin (Pin 9)
This pin should be left open.
FORWARD (FWD) Pin (Pin 10)
The connection point to the switching node of the transformer output
winding for sensing and other functions.
OUTPUT VOLTAGE (VOUT) Pin (Pin 11)
This pin is connected directly to the output voltage of the power
supply to provide bias to the secondary IC.
SYNCHRONOUS RECTIFIER DRIVE (SR) Pin (Pin 12)
Connection to external SR FET gate terminal.
SECONDARY BYPASS (BPS) Pin (Pin 13)
It is the connection point for an external bypass capacitor for the
secondary-side controller supply.
FEEDBACK (FB) Pin (Pin 14)
This pin connects to an external resistor divider to set the power
supply CV voltage regulation threshold.
SECONDARY GROUND (GND) (Pin 15)
Ground connection for the secondary IC.
ISENSE (IS) Pin (Pin 16)
Connection to the power supply output terminals. An external
current sense resistor is connected between this pin and the SECOND-
ARY GROUND pin.
D1
S 3-6
BPP 7
V8
Figure 5. Pin Configuration.
16 IS
15 GND
14 FB
13 BPS
12 SR
11 VOUT
10 FWD
9 NC
PI-7454-082715
If secondary current sense is not required, the ISENSE pin should be
connected to the SECONDARY GROUND pin.
InnoSwitch-EP Functional Description
The InnoSwitch-EP combines a high-voltage power MOSFET switch,
along with both primary-side and secondary-side controllers in one
device. It has a novel inductive coupling feedback scheme using the
package leadframe and bond wires to provide a reliable and low-cost
means to provide accurate direct sensing of the output voltage and
output current on the secondary to communicate information to the
primary IC. Unlike conventional PWM (pulse width modulated)
controllers, it uses a simple ON/OFF control to regulate the output
voltage and current. The primary controller consists of an oscillator, a
receiver circuit magnetically coupled to the secondary controller, current
limit state machine, 5.95 V regulator on the PRIMARY BYPASS pin,
overvoltage circuit, current limit selection circuitry, over temperature
protection, leading edge blanking and a 725 V / 900 V power MOSFET.
The InnoSwitch-EP secondary controller consists of a transmitter circuit
that is magnetically coupled to the primary receiver, constant voltage
(CV) and constant current (CC) control circuitry, a 4.4 V regulator on the
SECONDARY BYPASS pin, synchronous rectifier MOSFET driver,
frequency jitter oscillator and a host of integrated protection features.
Figures 3 and 4 show the functional block diagrams of the primary and
secondary controllers with the most important features.
PRIMARY BYPASS Pin Regulator
The PRIMARY BYPASS pin has an internal regulator that charges the
PRIMARY BYPASS pin capacitor to VBPP by drawing current from the
voltage on the DRAIN pin whenever the power MOSFET is off. The
PRIMARY BYPASS pin is the internal supply voltage node. When the
power MOSFET is on, the device operates from the energy stored in
the PRIMARY BYPASS pin capacitor. Extremely low power consump-
tion of the internal circuitry allows the InnoSwitch-EP to operate
continuously from current it takes from the DRAIN pin.
In addition, there is a shunt regulator clamping the PRIMARY BYPASS
pin voltage to VSHUNT when current is provided to the PRIMARY BYPASS
pin through an external resistor. This facilitates powering the
InnoSwitch-EP externally through a bias winding to decrease the
no-load consumption to less than 10 mW (5V output design).
PRIMARY BYPASS Pin Capacitor Selection
The PRIMARY BYPASS pin can use a ceramic capacitor as small as
0.1 mF for decoupling the internal power supply of the device. A
larger capacitor size can be used to adjust the current limit. A 1 mF
capacitor on the PRIMARY BYPASS pin will select a higher current limit
equal to the standard current of the next larger device. A 10 mF
capacitor on the PRIMARY BYPASS pin selects a lower current limit
equal to the standard current limit of the next smaller device.
PRIMARY BYPASS Pin Undervoltage Threshold
The PRIMARY BYPASS pin undervoltage circuitry disables the power
MOSFET when the PRIMARY BYPASS pin voltage drops below
VBPP-VBPP(H) in steady-state operation. Once the PRIMARY BYPASS pin
voltage falls below this threshold, it must rise back to VBPP to enable
(turn-on) the power MOSFET.
PRIMARY BYPASS Pin Output Overvoltage Latching Function
The PRIMARY BYPASS pin has an OV protection latching feature.
A Zener diode in parallel to the resistor in series with the PRIMARY
BYPASS pin capacitor is typically used to detect an overvoltage on the
primary bias winding to activate this protection mechanism. In the
event the current into the PRIMARY BYPASS pin exceeds (ISD) the
device will disable the power MOSFET switching. The latching
condition is reset by bringing the primary bypass below the reset
threshold voltage (VBPP(RESET)).
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3
Rev. G 09/17

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InnoSwitch-EP
Over-Temperature Protection
The thermal shutdown circuitry senses the primary die temperature.
This threshold is typically set to 142 °C with 75 °C hysteresis. When
the die temperature rises above this threshold the power MOSFET is
disabled and remains disabled until the die temperature falls by 75 °C,
at which point it is re-enabled. A large hysteresis of 75 °C is provided
to prevent over-heating of the PC board due to continuous fault
condition.
Current Limit Operation
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the power
MOSFET is turned off for the remainder of that switch cycle. The
current limit state-machine reduces the current limit threshold by
discrete amounts under medium and light loads.
The leading edge blanking circuit inhibits the current limit comparator
for a short time (tLEB) after the power MOSFET is turned-on. This
leading edge blanking time has been set so that current spikes
caused by capacitance and secondary-side rectifier reverse recovery
time will not cause premature termination of the switching pulse.
Each switching cycle is terminated when the Drain current of the
primary power MOSFET reaches the current limit of the device.
Auto-Restart
In the event of a fault condition such as output overload, output
short-circuit or external component/pin fault, the InnoSwitch-EP
enters into auto-restart (AR) operation. In auto-restart operation the
power MOSFET switching is disabled for t .AR(OFF) There are 2 ways to
enter auto-restart:
1. Continuous switching requests from the secondary for time period
exceeding tAR.
2. No requests for switching cycles from the secondary for a time
period exceeding t .AR(SK)
The first condition corresponds to a condition wherein the secondary
controller makes continuous cycle requests without a skipped-cycle
for more than tAR time period. The second method was included to
ensure that if communication is lost, the primary tries to restart
again. Although this should never be the case in normal operation,
this can be useful in the case of system ESD events for example
where a loss of communication due to noise disturbing the secondary
controller, is resolved when the primary restarts after an auto-restart
off time.
The auto-restart alternately enables and disables the switching of the
power MOSFET until the fault is removed. The auto-restart counter is
gated by the switch oscillator in SOA mode the auto-restart off timer
may appear to be longer.
The auto-restart counter is reset once the PRIMARY BYPASS pin falls
below the undervoltage threshold VBPP-VBPP(HYS).
Safe-Operating-Area (SOA) Protection
In the event there are two consecutive cycles where the primary
power MOSFET switch current reaches current limit (ILIM) within the
blanking (tLEB) plus the current limit (tILD) delay time, the controller will
skip approximately 2.5 cycles or ~25 msec. This provides sufficient
time for reset of the transformer without sacrificing start-up time into
large capacitive load. Auto-restart timing is increased when the
device is operating in SOA-mode.
Primary-Secondary Handshake Protocol
At start-up, the primary initially switches without any feedback
information (this is very similar to the operation of a standard
TOPSwitch™, TinySwitch™ or LinkSwitch™ controllers). If no
feedback signals are received during the auto-restart on-time,
the primary goes into auto-restart and repeats. However under
normal conditions, the secondary chip will power-up through the
FORWARD pin or directly from VOUT and then take over control.
From then onwards the secondary is in control of demanding
switching cycles when required.
The handshake flowchart is shown in Figure 6 below.
In the event the primary stops switching or does not respond to cycle
requests from the secondary during normal operation when the
secondary has control, the handshake protocol is initiated to ensure
that the secondary is ready to assume control once the primary
begins switching again. This protocol for an additional handshake is
also invoked in the event the secondary detects that the primary is
providing more cycles than were requested.
Start
P: Powered Up, Switching
S: Powering Up
P: Primary Chip
S: Secondary Chip
S: Has powered
up within tAR
No
Yes
P: Switching
S: Sends Handshaking Pulses
P: Auto-Restart
S: Powering Up
2s
P: Goes to Auto-Restart Off
S: Bypass Discharging
tAR
P: Has Received
Handshaking
Pulses
No
Yes
P: Stops Switching, Hands
Over Control to Secondary
P: Continuous Switching
S: Doesn’t Take Control
S: Has Taken
Control?
No P: Not Switching
S: Doesn’t Take Control
Yes
End of Handshaking,
Secondary Control Mode
PI-7904-032116
Figure 6. Primary – Secondary Handshake Flowchart.
4
Rev. G 09/17
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InnoSwitch-EP
The most likely event that could require an additional handshake is
when the primary stops switching resulting from a momentary line
drop-out or brown-out event. When the primary resumes operation,
it will default into a start-up condition and attempt to detect hand-
shake pulses from the secondary.
In the event the secondary does not detect that the primary responds
to requests for 14 consecutive cycles, or if the secondary detects that
the primary is switching without cycle requests, the secondary
controller will initiate a second handshake sequence.
This protection mode also provides additional protection against
cross-conduction of the SR MOSFET while the primary is switching.
This protection mode also prevents output overvoltage in the event
the primary is reset while the secondary is still in control and light/
medium load conditions exist.
Line Voltage Monitor
The VOLTAGE MONITOR pin is used for input under and overvoltage
sensing and protection function.
A 8 MW resistor is tied between the high voltage bulk DC capacitor
after the bridge or connected through a set of diodes from the AC
side of bridge and small high-voltage capacitor and bleed resistor
(for fast AC reset) and VOLTAGE MONITOR pin to enable this function.
To disable this function the VOLTAGE MONITOR pin should be tied to
the PRIMARY BYPASS pin.
At power-up after the BPP is charged and the ILIM is latched, prior to
switching the state of VOLTAGE MONITOR pin current is checked to
determine that it is above brown-in (IUV+) and below the overvoltage
shutdown threshold (IOV+) to proceed with start-up.
If during normal operation the VOLTAGE MONITOR pin current falls
below the brown-out (IUV-) threshold and remains below brown-out
(IUV-) for longer than tUV- the controller enters into auto-restart with a
short auto-restart off-time (~200 ms). Switching will only resume
once the VOLTAGE MONITOR pin current is above the brown-in
threshold (IUV+) for a time period exceeding ~150 ms.
In the event during normal operation the VOLTAGE MONITOR pin
current is above the overvoltage threshold (IOV+) for longer than tOV,
the controller will enter auto-restart with a short auto-restart off-time
(~200 ms). Switching will only resume once the VOLTAGE MONITOR
pin current fall below (IOV-) for a time period exceeding ~150 ms.
Secondary Controller
Once the device enters the short auto-restart OFF-time, the PRIMARY
BYPASS pin will activate an internal bleed to discharge the input bulk
capacitor. The feedback driver block is the drive to the FluxLink
communication loop transferring switching pulse requests to the
primary IC.
As shown in the block diagram in Figure 4, the secondary controller
is powered through a 4.45 V Regulator block by either VOUT or
FORWARD pin connections to the SECONDARY BYPASS pin. The
SECONDARY BYPASS pin is connected to an external decoupling
capacitor and fed internally from the regulator block.
The FORWARD pin also connects to the negative edge detection
block used for both handshaking and timing to turn on the synchro-
nous rectifier MOSFET (SR FET) connected to the SYNCHRONOUS
RECTIFIER DRIVE pin. The FORWARD pin is also used to sense when
to turn off the SR FET in discontinuous mode operation when the
voltage across the FET on resistance drops below VSR(TH).
In continuous mode operation the SR FET is turned off when the
pulse request is sent to demand the next switching cycle, providing
excellent synchronization free of any overlap for the FET turn-off
while operating in continuous mode.
The mid-point of an external resistor divider network between the
VOUT and SECONDARY GROUND pins is tied to the FEEDBACK pin
to regulate the output voltage. The internal voltage comparator
reference voltage is VREF (1.265 V).
The external current sense resistor connected between IS and
SECONDARY GROUND pins is used to regulate the output current in
constant current mode. The internal current sense comparator
threshold ISVTH is used to determine the value at which the power
supply output current is regulated.
Secondary Controller Oscillator
The typical oscillator frequency is internally set to an average
frequency of 100 kHz.
The oscillator incorporates circuitry that introduces a small amount of
frequency jitter, typically 6 kHz peak-to-peak, to minimize EMI emission.
The modulation rate of the frequency jitter is set to 1 kHz to optimize
EMI reduction for both average and quasi-peak emissions.
Output Overvoltage Protection
In the event the sensed voltage on the FEEDBACK pin is 2% higher
than the regulation threshold, a bleed current of ~10 mA is applied on
the VOUT pin. This bleed current increases to ~140 mA in the event
the FEEDBACK pin voltage is raised to beyond ~20% of the internal
FEEDBACK pin reference voltage. The current sink on the VOUT pin
is intended to discharge the output voltage for momentary overshoot
events. The secondary does not relinquish control to the primary
during this mode of operation.
FEEDBACK Pin Short Detection
In the event the FEEDBACK pin voltage is below the VFB(OFF) threshold
at start-up, the secondary will complete the primary/secondary hand-
shake and will stop requesting pulses to initiate an auto-restart. The
secondary will stop requesting cycles for tAR(SK), to begin primary-side
auto-restart of t .AR(OFF)SH In this condition, the total apparent AR
off-time is tAR(SK) + t .AR(OFF)SH During normal operation, the secondary
will stop requesting pulses from the primary to initiate an auto-restart
cycle when the FEEDBACK pin voltage falls below VFB(OFF) threshold.
The deglitch filter on the VFB(OFF) is less than 10 msec.
FEEDBACK Pin Auto-Restart Threshold
The FEEDBACK pin also includes a comparator to detect when the
output voltage falls below the VFB(AR) threshold for a duration exceeding
tFB(AR) . Although the detection for auto-restart is on the FEEDBACK
pin, the VFB(AR) threshold is referenced to approximately 2 V below the
set output voltage of the power supply. The secondary controller will
relinquish control when it detects the FEEDBACK pin has fallen below
VFB(AR) for a time duration longer than tFB(AR). This threshold is meant
to limit the range of constant current (CC) operation.
Output Constant-Current Regulation
The InnoSwitch-EP regulates the output current through a resistor
between the ISENSE and SECONDARY GROUND pins. If constant
current regulation is not required, this pin must be tied to the
GROUND pin.
SR Disable Protection
On a cycle by cycle basis the SR is only engaged in the event a cycle
was requested by the secondary controller and the negative edge is
detected on the FORWARD pin. In the event the voltage on the
ISENSE pin exceeds approximately 3 times the ISVTH threshold, the
SR MOSFET drive is disabled until the surge current has diminished to
nominal levels.
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5
Rev. G 09/17