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ISL6556B
NOT RECOMMENDED FOR NEW DESIGNS
NO RECOMMENDED REPLACEMENT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
Optimized Multi-Phase PWM Controller with 6-Bit DAC and Programmable
Internal Temperature Compensation for VR10.X Application
DATASHEET
FN9097
Rev 4.00
December 28, 2004
The ISL6556B controls microprocessor core voltage
regulation by driving up to 4 synchronous-rectified buck
channels in parallel. Multi-phase buck converter architecture
uses interleaved timing to multiply channel ripple frequency
and reduce input and output ripple currents.
The ISL6556B utilizes rDS(ON) current sensing in each
phase for adaptive voltage positioning (droop), channel-
current balancing, and overcurrent protection. To ensure the
accuracy of droop, a programmable internal temperature
compensation function is implemented to nullify the effect of
rDS(ON) temperature sensitivity.
A unity gain, differential amplifier is provided for remote voltage
sensing. Any potential difference between remote and local
grounds can be eliminated using the remote-sense amplifier.
The precision threshold-sensitive enable input is available to
accurately coordinate the startup of the ISL6556B with Intersil
MOSFET driver IC. Dynamic-VID™ technology allows
seamless on-the-fly VID changes. The offset pin allows accurate
voltage offset settings that are independent of VID setting. The
ISL6556B uses 5V bias and has a built-in shunt regulator to
allow 12V bias using only a small external limiting resistor.
Ordering Information
PART NUMBER TEMP. (°C)
PACKAGE
PKG. DWG. #
ISL6556BCB*
0 to 70 28 Ld SOIC
M28.3
ISL6556BCBZ*
(Note)
0 to 70 28 Ld SOIC (Pb-free) M28.3
ISL6556BCBZA 0 to 70 28 Ld SOIC Tape and M28.3
-T (Note)
Reel (Pb-free)
ISL6556BCR*
0 to 70 32 Ld 5x5B QFN
L32.5x5B
ISL6556BCRZ*
(Note)
0 to 70 32 Ld 5x5B QFN
(Pb-free)
L32.5x5B
* Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Precision Multi-Phase Core Voltage Regulation
- Differential Remote Voltage Sensing
- 0.5% System Accuracy Over Temperature and Life
- Adjustable Reference-Voltage Offset
• Precision rDS(ON) Current Sensing
- Integrated Programmable Temperature Compensation
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Low-Cost, Lossless Current Sensing
• Internal Shunt Regulator for 5V or 12V Biasing
• Microprocessor Voltage Identification Input
- Dynamic VID™ Technology
- 6-Bit VID Input
- 0.8375V to 1.600V in 12.5mV Steps
• Threshold Enable Function for Precision Sequencing
• Overcurrent Protection
• Overvoltage Protection
- No Additional External Components Needed
- OVP Pin to drive optional Crowbar Device
• 2, 3, or 4 Phase Operation up to 1.5MHz per Phase
• QFN Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
Pb-free Available (RoHS Compliant)
FN9097 Rev 4.00
December 28, 2004
Page 1 of 24

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ISL6556B
Pinouts
32 LEAD QFN
TOP VIEW
32 31 30 29 28 27 26 25
VID3 1
24 PWM4
VID2 2
23 ISEN4
VID1 3
22 ISEN2
VID0 4
21 PWM2
VID12.5 5
20 PWM1
OFS 6
19 ISEN1
TCOMP 7
18 GND
REF 8
17 ISEN3
9 10 11 12 13 14 15 16
28 LEAD SOIC
TOP VIEW
OVP 1
PGOOD 2
VID4 3
VID3 4
VID2 5
VID1 6
VID0 7
VID12.5 8
OFS 9
TCOMP 10
REF 11
FB 12
COMP 13
VDIFF 14
28 FS
27 EN
26 VCC
25 PWM4
24 ISEN4
23 ISEN2
22 PWM2
21 PWM1
20 ISEN1
19 ISEN3
18 PWM3
17 GND
16 RGND
15 VSEN
FN9097 Rev 4.00
December 28, 2004
Page 2 of 24

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ISL6556B
ISL6565BCB Block Diagram
RGND
VSEN
VDIFF PGOOD
OVP
x1
S OVP R
LATCH
Q
VCC
POWER-ON
RESET (POR)
OVP
+200mV
SOFT-START
AND
FAULT LOGIC
CLOCK AND
SAWTOOTH
GENERATOR
PWM
OFS
OFFSET
PWM
1.24V
EN
THREE-STATE
FS
PWM1
PWM2
REF
VID4
VID3
VID2
VID1
VID0
VID12.5
COMP
FB
DYNAMIC
VID
D/A
TCOMP
T
PWM
PWM3
PWM
E/A
I_TRIP
OC
I_TOT
CHANNEL
CURRENT
BALANCE
CHANNEL
DETECT
SAMPLE
&
HOLD
PWM4
CHANNEL
CURRENT
SENSE
ISEN1
ISEN2
ISEN3
ISEN4
FN9097 Rev 4.00
December 28, 2004
GND
Page 3 of 24

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ISL6556B
ISL6565BCR Block Diagram
RGND
VSEN
VDIFF PGOOD
OVP
x1
S OVP R
LATCH
Q
VCC
POWER-ON
RESET (POR)
ENLL
1.24V
EN
OVP
+200mV
SOFT-START
AND
FAULT LOGIC
CLOCK AND
SAWTOOTH
GENERATOR
PWM
THREE-STATE
FS
PWM1
OFS
OFSOUT
REF
OFFSET
VID4
VID3
VID2
VID1
VID0
VID12.5
COMP
FB
DYNAMIC
VID
D/A
TCOMP
T
PWM
PWM2
PWM
PWM3
PWM
E/A
I_TRIP
OC
I_TOT
CHANNEL
CURRENT
BALANCE
CHANNEL
DETECT
SAMPLE
&
HOLD
PWM4
CHANNEL
CURRENT
SENSE
ISEN1
ISEN2
ISEN3
ISEN4
FN9097 Rev 4.00
December 28, 2004
GND
Page 4 of 24

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ISL6556B
Typical Application of ISL6556BCB
+12V
+5V
FB
VDIFF
COMP VCC
TCOMP
VSEN
RGND
REF
PGOOD
OVP
ISL6556BCB
VID4
PWM1
ISEN1
VID3
VID2
VID1
PWM2
ISEN2
VID0
VID12.5
PWM3
ISEN3
OFS
FS
GND
RT
PWM4
ISEN4
EN
VID_PGOOD
(BUFFERED)
VCC BOOT
UGATE
PVCC
PHASE
HIP6601B
LGATE
PWM
GND
+12V
VCC BOOT
UGATE
PVCC
PHASE
HIP6601B
LGATE
PWM
GND
+12V
VCC BOOT
UGATE
PVCC
PHASE
HIP6601B
LGATE
PWM
GND
+12V
VCC BOOT
UGATE
PVCC
PHASE
HIP6601B
LGATE
PWM
GND
FN9097 Rev 4.00
December 28, 2004
VIN
VIN
VIN
P
LOAD
VIN
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