X5323, X5325 (Replaces X25323, X25325)
Principles of Operation
Power-on Reset
Application of power to the X5323/X5325 activates a power-on
reset circuit. This circuit goes active at about 1V and pulls the
RESET/RESET pin active. This signal prevents the system
microprocessor from starting to operate with insufficient voltage
or prior to stabilization of the oscillator. As long as
RESET/RESET pin is active, the device will not respond to any
Read/Write instruction. When VCC exceeds the device VTRIP
value for 200ms (nominal) the circuit releases RESET/RESET,
allowing the processor to begin executing code.
Low Voltage Monitoring
During operation, the X5323/X5325 monitors the VCC level and
asserts RESET/RESET if supply voltage falls below a preset
minimum VTRIP. The RESET/RESET signal prevents the
microprocessor from operating in a power fail or brown-out
condition. The RESET/RESET signal remains active until the
voltage drops below 1V. It also remains active until VCC returns
and exceeds VTRIP for 200ms.
Watchdog Timer
The watchdog timer circuit monitors the microprocessor activity
by monitoring the WDI input. The microprocessor must toggle the
CS/WDI pin periodically to prevent a RESET/RESET signal.
The CS/WDI pin must be toggled from HIGH to LOW prior to
the expiration of the watchdog time out period. The state of two
nonvolatile control bits in the status register determine the
watchdog timer period. The microprocessor can change these
watchdog bits, or they may be “locked” by tying the WP pin
LOW and setting the WPEN bit HIGH.
VCC Threshold Reset Procedure
The X5323/X5325 has a standard VCC threshold (VTRIP)
voltage. This value will not change over normal operating and
storage conditions. However, in applications where the
standard VTRIP is not exactly right, or for higher precision in the
VTRIP value, the X5323/X5325 threshold may be adjusted.
Setting the VTRIP Voltage
This procedure sets the VTRIP to a higher voltage value. For
example, if the current VTRIP is 4.4V and the new VTRIP is 4.6V,
this procedure directly makes the change. If the new setting is
lower than the current setting, then it is necessary to reset the
trip point before setting the new value.
and pulse CS/WDI LOW then HIGH. Remove VP and the
sequence is complete.
CS
SCK
VP
VP
SI
FIGURE 1. SET VTRIP VOLTAGE
Resetting the VTRIP Voltage
This procedure sets the VTRIP to a “native” voltage level. For
example, if the current VTRIP is 4.4V and the VTRIP is reset, the
new VTRIP is something less than 1.7V. This procedure must
be used to set the voltage to a lower value.
To reset the VTRIP voltage, apply a voltage between 2.7V and
5.5V to the VCC pin. Tie the CS/WDI pin, the WP pin, and the
SCK pin HIGH. RESET/RESET and SO pins are left
unconnected. Then apply the programming voltage VP to the
SI pin ONLY and pulse CS/WDI LOW then HIGH. Remove VP
and the sequence is complete.
CS
SCK VCC
VP
SI
FIGURE 2. RESET VTRIP VOLTAGE
To set the new VTRIP voltage, apply the desired VTRIP
threshold to the VCC pin and tie the CS/WDI pin and the WP
pin HIGH. RESET/RESET and SO pins are left unconnected.
Then apply the programming voltage VP to both SCK and SI
FN8131 Rev 3.00
December 9, 2015
Page 4 of 19
