The communication is extremely robust. Measures against loss of
communication have been implemented to make the device tolerant
to extreme conditions such as surge, ESD events, or failure of
external component (single point faults).
In the event the secondary does not detect that the primary responds
to requests for 3 consecutive cycles, or if the secondary detects that
the primary is switching without cycle requests for 3 or more
consecutive cycles, the secondary controller will initiate a second
This protection mode also provides additional protection against
cross-conduction of the SR MOSFET while the primary is switching
with the primary-side in control. This protection mode also prevents
output overvoltage in the event the primary is reset while the
secondary is still in control and light/medium load conditions exist.
The feedback driver block is the drive to the FluxLink communication
loop transferring switching pulse requests to the primary IC.
As shown in the block diagram in Figure 4, the secondary controller
is powered through a 4.45 V Regulator block by either VOUT or
FORWARD pin connections to the SECONDARY BYPASS pin. The
SECONDARY BYPASS pin is connected to an external decoupling
capacitor and fed internally from the regulator block.
The FORWARD pin also connects to the negative edge detection
block used for both handshaking and timing to turn on the synchro-
nous rectifier MOSFET (SR FET) connected to the SYNCHRONOUS
RECTIFIER DRIVE pin. The FORWARD pin is also used to sense when
to turn off the SR FET in discontinuous mode operation when the
voltage across the FET on resistance drops below VSR(TH).
In continuous mode operation the SR FET is turned off when the
pulse request is sent to demand the next switching cycle, providing
excellent synchronization free of any overlap for the FET turn-off
while operating in continuous mode.
The mid-point of an external resistor divider network between the
VOUT and SECONDARY GROUND pins is tied to the FEEDBACK pin
to regulate the output voltage. The internal voltage comparator
reference voltage is VREF (1.265V).
The resistor connected between IS and SECONDARY GROUND pins is
the bonding wire sense resistor which is used to regulate the output
current in constant current regulator mode. The ISENSE pin is
connected to the internal bond wire sense resistor and a 33 mV ISV(TH)
threshold comparator used to determine the value at which the power
supply output current is regulated.
Output Overvoltage Protection
In the event the sensed voltage on the FEEDBACK pin is 2% higher
than the regulation threshold, a bleed current of ~10 mA is applied on
the VOUT pin. This bleed current increases to ~140 mA in the event
the FEEDBACK pin voltage is raised to beyond ~20% of the internal
FEEDBACK pin reference voltage. The current sink on the VOUT pin
is intended to discharge the output voltage for momentary overshoot
events. The secondary does not relinquish control to the primary
during this mode of operation.
FEEDBACK Pin Short Detection
In the event the FEEDBACK pin voltage is below the VFB(OFF) threshold
at start-up, the secondary will complete the primary/secondary
handshake and will stop requesting pulses to initiate an auto-restart.
The secondary will stop requesting cycles for t ,AR(SK) to begin primary-
side auto-restart of tAR(OFF). In this condition, the total apparent AR
off-time is tAR(SK) + tAR(OFF). During normal operation, the secondary
will stop requesting pulses from the primary to initiate an auto-restart
cycle when the FEEDBACK pin voltage falls below VFB(OFF) threshold.
The deglitch filter on the VFB(OFF) is less than 10 msec. The secondary
will relinquish control after detecting the FEEDBACK pin is shorted to
OUTPUT VOLTAGE Pin Auto-Restart Threshold
The OUTPUT VOLTAGE pin includes a comparator to detect when the
output voltage falls below the VOUT(AR) threshold for a duration exceed-
ing t .VOUT(AR) The secondary controller will relinquish control when it
detects the OUTPUT VOLTAGE pin has fallen below VOUT(AR) for a time
duration longer than t .VOUT(AR) This threshold is meant to limit the
range of constant current (CC) operation.
Cable Drop Compensation (CDC)
The amount of cable drop compensation is a function of the load with
respect to the constant current regulation threshold as illustrated in
Figure 7 below.
φCD × VFB
Onset of CC
Figure 7. Cable Drop Compensation Characteristic.
The lower feedback pin resistor must be tied to the SECONDARY
GROUND pin (not ISENSE pin) to have output cable drop compensa-
Cable drop compensation only applies for 5 V designs. Cable drop
compensation function is disabled for higher output voltage designs.
Output Constant Current Regulation
The InnoSwitch-CH regulates the output current through internal
sense across bond wires between the ISENSE and SECONDARY
GROUND pins. An external diode may be required across the
ISENSE-SECONDARY GROUND pins to limit the peak voltage across
the bond wire during fault condition. Larger output capacitance
especially at higher output voltages, the output capacitor discharge
into a short-circuited output can exceed the bond wire fusing current.
SR Disable Protection
On a cycle-by-cycle basis the SR is only engaged in the event a cycle
was requested by the secondary controller and the negative edge is
detected on the FORWARD pin. In the event the voltage on the
ISENSE pin exceeds approximately 3 times the ISV(TH) threshold, the
SR MOSFET drive is disabled until the surge current has diminished
to nominal levels.
Rev. J 10/17