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InnoSwitch-CH Family
Off-Line CV/CC Flyback Switcher IC with Integrated 650 V MOSFET,
Synchronous Rectification and Feedback
Product Highlights
Highly Integrated, Compact Footprint
Incorporates flyback controller, 650 V MOSFET, secondary-side
sensing and synchronous rectification driver
Integrated FluxLink, HIPOT-isolated, feedback link
Exceptional CV/CC accuracy, independent of transformer design or
external components
Instantaneous transient response ±5% CV with 0%-100%-0%
load step
EcoSmart– Energy Efficient
<10 mW no-load at 230 VAC when supplied by transformer bias
winding
Easily meets all global energy efficiency regulations
Low heat dissipation
Advanced Protection / Safety Features
Primary sensed output OVP
Secondary sensed output overshoot clamp
Secondary sensed output OCP to zero output voltage
Hysteretic thermal shutdown
Full Safety and Regulatory Compliance
100% production HIPOT compliance testing equivalent to
6 kV DC/1 sec
Reinforced insulation
Isolation voltage >3,500 VAC
UL1577 and TUV (EN60950) safety approved
EN61000-4-8 (100 A/m) and EN61000-4-9 (1000 A/m) compliant
Green Package
Halogen free and RoHS compliant
Applications
Chargers and adapters for smart mobile devices
High efficiency, low voltage, high current power supplies
Description
The InnoSwitch-CH family of ICs dramatically simplifies the develop-
ment and manufacturing of low-voltage, high current power supplies,
particularly those in compact enclosures or with high efficiency require-
ments. The InnoSwitch-CH architecture is revolutionary in that the
devices incorporate both primary and secondary controllers, with sense
elements and a safety-rated feedback mechanism into a single IC.
Close component proximity and innovative use of the integrated
communication link permit accurate control of a secondary-side
synchronous rectification MOSFET and optimization of primary-side
switching to maintain high efficiency across the entire load range.
Additionally, the minimal DC bias requirements of the link enables the
system to achieve less than 10 mW no-load in challenging applications
such as smart-mobile device chargers.
SR FET
D
InnoSwitch-CH
Primary FET
and Controller
S
BPP
Figure 1. Typical Application/Performance.
VOUT
Secondary
IS Control IC
PI-6986-103014
Figure 2. High Creepage, Safety-Compliant eSOP Package.
Output Power Table
Product 3,4
Adapter1
85-265 VAC
Peak or
Open Frame2
INN20x3K
INN20x4K
INN20x5K
12 W
15 W
20 W
15 W
20 W
25 W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical non-ventilated enclosed typical size
adapter measured at 40 °C ambient. Max output power is dependent on the
design. With condition that package temperature must be < = 125 °C.
2. Minimum peak power capability.
3. Package: eSOP-R16B.
4. x = 0 (No cable compensation), x = 2 (6% cable compensation).
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This Product is Covered by Patents and/or Pending Patent Applications.
October 2017

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InnoSwitch-CH
PRIMARY BYPASS
(BPP)
FAULT
PRESENT
AUTO-
RESTART
COUNTER
RESET
FROM
FEEDBACK
DRIVER
PRI/SEC
RECEIVER
CONTROLLER
PULSE
DCMAXS
6.4 V
20
JITTER
CLOCK
DCMAX
OSCILLATOR
OVP
LATCH
Figure 3. Primary-Side Controller Block Diagram.
OUTPUT
VOLTAGE
(VO)
REGULATOR
4.45 V
SCONDARY
BYPASS
(BPS)
FEEDBACK
(FB)
ISENSE
(IS)
SYNC RECT
(SR)
4.45 V
3.80 V
+
-
CABLE
COMPENSATION
+
-
+
-
IS THRESHOLD
ENB
CONTROL
CLOCK
OSCILLATOR
QS
QR
Figure 4. Secondary-Side Controller Block Diagram.
REGULATOR
5.95 V
BYPASS
CAPACITOR
SELECT AND
CURRENT
LIMIT STATE
MACHINE
+
-
5.95 V
5.39 V
BYPASS PIN
UNDERVOLTAGE
VILIMIT
CURRENT LIMIT
COMPARATOR
-
+
THERMAL
SHUTDOWN
DRAIN
(D)
SQ
RQ
LEADING
EDGE
BLANKING
PI-7432-110414
SOURCE
(S)
DETECTOR
HAND SHAKE
PULSES
FORWARD
(FWD)
FEEDBACK
DRIVER
TO
RECEIVER
ENABLE
SR
+
-
SR THESHOLD
SECONDARY
GROUND
(GND)
PI-7433-092717
2
Rev. J 10/17
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InnoSwitch-CH
Pin Functional Description
DRAIN (D) Pin (Pin 1)
This pin is the power MOSFET drain connection.
SOURCE (S) Pin (Pin 3-6)
This pin is the power MOSFET source connection. It is also the
ground reference for the PRIMARY BYPASS pin.
PRIMARY BYPASS (BPP) Pin (Pin 7)
It is the connection point for an external bypass capacitor for the
primary IC supply.
NO CONNECTION (NC) Pin (Pin 8)
This pin should be left open or tied to PRIMARY BYPASS pin.
NO CONNECTION (NC) Pin (Pin 9)
This pin should be left open.
FORWARD (FWD) Pin (Pin 10)
The connection point to the switching node of the transformer output
winding for sensing and other functions.
OUTPUT VOLTAGE (VOUT) Pin (Pin 11)
This pin is connected directly to the output voltage of the power
supply to provide bias to the secondary IC.
SYNCHRONOUS RECTIFIER DRIVE (SR) Pin (Pin 12)
Connection to external SR FET gate terminal.
SECONDARY BYPASS (BPS) Pin (Pin 13)
It is the connection point for an external bypass capacitor for the
secondary IC supply.
FEEDBACK (FB) Pin (Pin 14)
This pin connects to an external resistor divider to set the power
supply CV voltage regulation threshold.
SECONDARY GROUND (GND) (Pin 15)
Ground connection for the secondary IC.
ISENSE (IS) Pin (Pin 16)
Connection to the power supply output terminals. Internal current
sense is connected between this pin and the SECONDARY GROUND pin.
D1
S 3-6
BPP 7
NC 8
Figure 5. Pin Configuration.
16 IS
15 GND
14 FB
13 BPS
12 SR
11 VOUT
10 FWD
9 NC
PI-7398-072915
InnoSwitch-CH Functional Description
The InnoSwitch-CH combines a high-voltage power MOSFET switch
and both primary-side and secondary-side controllers in one device.
The feedback scheme using a proprietary FluxLink coupling scheme
using the package lead frame and bond wires to provide a reliable
and low-cost means to provide accurate direct sensing of the output
voltage and output current on the secondary to communicate
information to the primary IC. Unlike conventional PWM (pulse width
modulated) controllers, it uses a simple ON/OFF control to regulate
the output voltage and current. The primary controller consists of an
oscillator, a receiver circuit magnetically coupled to the secondary
controller, current limit state machine, 5.95 V regulator on the
PRIMARY BYPASS pin, overvoltage circuit, current limit selection
circuitry, over temperature protection, leading edge blanking and a
650 V power MOSFET. The InnoSwitch-CH secondary controller
consists of a transmitter circuit that is magnetically coupled to the
primary receiver, constant voltage (CV) and constant current (CC)
control circuitry, a 4.45 V regulator on the SECONDARY BYPASS pin,
synchronous rectifier MOSFET driver, frequency jitter oscillator and a
host of integrated protection features. Figures 3 and 4 show the
functional block diagrams of the primary and secondary controllers
with the most important features.
PRIMARY BYPASS Pin Regulator
The PRIMARY BYPASS pin has an internal regulator that charges the
PRIMARY BYPASS pin capacitor to VBPP by drawing current from the
voltage on the DRAIN pin whenever the power MOSFET is off. The
PRIMARY BYPASS pin is the internal supply voltage node. When the
power MOSFET is on, the device operates from the energy stored in
the PRIMARY BYPASS pin capacitor. Extremely low power consump-
tion of the internal circuitry allows the InnoSwitch-CH to operate
continuously from current it takes from the DRAIN pin.
In addition, there is a shunt regulator clamping the PRIMARY BYPASS
pin voltage to VSHUNT when current is provided to the PRIMARY
BYPASS pin through an external resistor. This facilitates powering the
InnoSwitch-CH externally through a bias winding to decrease the
no-load consumption to less than 10 mW (5 V output design).
PRIMARY BYPASS Pin Capacitor Selection
The PRIMARY BYPASS pin can use a ceramic capacitor as small as
0.1 mF for decoupling the internal power supply of the device. A
larger capacitor size can be used to adjust the current limit. A 1 mF
capacitor on the PRIMARY BYPASS pin will select a higher current limit
equal to the standard current of the next larger device. A 10 mF
capacitor on the PRIMARY BYPASS pin selects a lower current limit
equal to the standard current limit of the next smaller device
PRIMARY BYPASS Pin Undervoltage Threshold
The PRIMARY BYPASS pin undervoltage circuitry disables the power
MOSFET when the PRIMARY BYPASS pin voltage drops below VBPP-VBPP(H)
in steady-state operation. Once the PRIMARY BYPASS pin voltage
falls below this threshold, it must rise back above VBPP to enable
switching the power MOSFET.
PRIMARY BYPASS Pin Output Overvoltage Latching Function
The PRIMARY BYPASS pin has an OV protection latching feature.
A Zener diode in parallel to the resistor in series with the PRIMARY
BYPASS pin capacitor is typically used to detect an overvoltage on the
primary bias winding to activate this protection mechanism. In the
event the current into the PRIMARY BYPASS pin exceeds (ISD) the
device will disable the power MOSFET switching. The latching
condition is reset by bringing the primary bypass below the reset
threshold voltage (VBPP(RESET)).
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3
Rev. J 10/17

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InnoSwitch-CH
Over-Temperature Protection
The thermal shutdown circuitry senses the primary die temperature.
This threshold is set to 142 °C with 75 °C hysteresis. When the die
temperature rises above this threshold the power MOSFET is disabled
and remains disabled until the die temperature falls by 75 °C, at which
point it is re-enabled. A large hysteresis of 75 °C is provided to
prevent over-heating of the PC board due to continuous fault condition.
Current Limit Operation
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the power
MOSFET is turned off for the remainder of that switch cycle. The
current limit state-machine reduces the current limit threshold by
discrete amounts under medium and light loads.
The leading edge blanking circuit inhibits the current limit comparator
for a short time (tLEB) after the power MOSFET is turned-on. This
leading edge blanking time has been set so that current spikes
caused by capacitance and secondary-side rectifier reverse recovery
time will not cause premature termination of the switching pulse.
Each switching cycle is terminated when the Drain current of the
primary power MOSFET reaches the current limit of the device.
Auto-Restart
In the event of a fault condition such as output overload, output
short-circuit or external component/pin fault, the InnoSwitch-CH
enters into auto-restart (AR) operation. In auto-restart operation the
power MOSFET switching is disabled for t .AR(OFF) There are 2 ways to
enter auto-restart after the secondary has taken control:
1. Continuous switching requests from the secondary for time period
exceeding tAR.
2. No requests for switching cycles from the secondary for a time
period exceeding t .AR(SK)
The first condition corresponds to a condition wherein the secondary
controller makes continuous cycle requests without a skipped-cycle
for more than tAR time period. The second method was included to
ensure that if communication is lost, the primary tries to restart again.
Although this should never be the case in normal operation, this can
be useful in the case of system ESD events for example where a loss
of communication due to noise disturbing the secondary controller, is
resolved when the primary restarts after an auto-restart off time.
The auto-restart alternately enables and disables the switching of the
power MOSFET until the fault is removed. The auto-restart counter is
gated by the switch oscillator in SOA mode the auto-restart off timer
may appear to be longer.
The auto-restart counter is reset once the primary PRIMARY BYPASS
pin falls below the undervoltage threshold VBPP-VBPP(HYS).
Safe-Operating-Area (SOA) Protection
In the event there are two consecutive cycles where the primary
power MOSFET switch current reaches current limit (ILIM) within the
blanking (tLEB) and current limit (tILD) delay time, the controller will
skip approximately 2.5 cycles or ~25 msec. This provides sufficient
time for reset of the transformer without sacrificing start-up time into
large capacitive load. Auto-restart timing is increased when the
device is operating in SOA-mode.
Primary-Secondary Handshake Protocol
At start-up, the primary initially switches without any feedback
information (this is very similar to the operation of a standard
TOPSwitch™, TinySwitch™ or LinkSwitch™ controllers). If no
feedback signals are received during the auto-restart on-time, the
primary goes into auto-restart and repeats. However under normal
conditions, the secondary chip will power-up through the FORWARD
pin or directly from VOUT and then take over control. From then
Start
P: Powered Up, Switching
S: Powering Up
P: Primary Chip
S: Secondary Chip
S: Has powered
up within tAR
No
Yes
P: Switching
S: Sends Handshaking Pulses
P: Auto-Restart
S: Powering Up
tAR(OFF)
P: Goes to Auto-Restart Off
S: Bypass Discharging
tAR
P: Has Received
Handshaking
Pulses
No
Yes
P: Stops Switching, Hands
Over Control to Secondary
P: Continuous Switching
S: Doesn’t Take Control
S: Has Taken
Control?
No P: Not Switching
S: Doesn’t Take Control
Yes
End of Handshaking,
Secondary Control Mode
PI-7416-110414
Figure 6. Primary – Secondary Handshake Flowchart.
onwards the secondary is in control of demanding switching cycles
when required.
The handshake flowchart is shown in Figure 6.
In the event the primary stops switching or does not respond to cycle
requests from the secondary during normal operation when the
secondary has control, the handshake protocol is imitated to ensure
that the secondary is ready to assume control once the primary
begins switching again. This protocol for an additional handshake is
also invoked in the event the secondary detects that the primary is
providing more cycles than were requested.
The most likely event that could require an additional handshake is
when the primary stops switching resulting from a momentary line
drop-out or brown-out event. When the primary resumes operation,
it will default into a start-up condition and attempt to detect hand-
shake pulses from the secondary.
4
Rev. J 10/17
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InnoSwitch-CH
The communication is extremely robust. Measures against loss of
communication have been implemented to make the device tolerant
to extreme conditions such as surge, ESD events, or failure of
external component (single point faults).
In the event the secondary does not detect that the primary responds
to requests for 3 consecutive cycles, or if the secondary detects that
the primary is switching without cycle requests for 3 or more
consecutive cycles, the secondary controller will initiate a second
handshake sequence.
This protection mode also provides additional protection against
cross-conduction of the SR MOSFET while the primary is switching
with the primary-side in control. This protection mode also prevents
output overvoltage in the event the primary is reset while the
secondary is still in control and light/medium load conditions exist.
Secondary Controller
The feedback driver block is the drive to the FluxLink communication
loop transferring switching pulse requests to the primary IC.
As shown in the block diagram in Figure 4, the secondary controller
is powered through a 4.45 V Regulator block by either VOUT or
FORWARD pin connections to the SECONDARY BYPASS pin. The
SECONDARY BYPASS pin is connected to an external decoupling
capacitor and fed internally from the regulator block.
The FORWARD pin also connects to the negative edge detection
block used for both handshaking and timing to turn on the synchro-
nous rectifier MOSFET (SR FET) connected to the SYNCHRONOUS
RECTIFIER DRIVE pin. The FORWARD pin is also used to sense when
to turn off the SR FET in discontinuous mode operation when the
voltage across the FET on resistance drops below VSR(TH).
In continuous mode operation the SR FET is turned off when the
pulse request is sent to demand the next switching cycle, providing
excellent synchronization free of any overlap for the FET turn-off
while operating in continuous mode.
The mid-point of an external resistor divider network between the
VOUT and SECONDARY GROUND pins is tied to the FEEDBACK pin
to regulate the output voltage. The internal voltage comparator
reference voltage is VREF (1.265V).
The resistor connected between IS and SECONDARY GROUND pins is
the bonding wire sense resistor which is used to regulate the output
current in constant current regulator mode. The ISENSE pin is
connected to the internal bond wire sense resistor and a 33 mV ISV(TH)
threshold comparator used to determine the value at which the power
supply output current is regulated.
Output Overvoltage Protection
In the event the sensed voltage on the FEEDBACK pin is 2% higher
than the regulation threshold, a bleed current of ~10 mA is applied on
the VOUT pin. This bleed current increases to ~140 mA in the event
the FEEDBACK pin voltage is raised to beyond ~20% of the internal
FEEDBACK pin reference voltage. The current sink on the VOUT pin
is intended to discharge the output voltage for momentary overshoot
events. The secondary does not relinquish control to the primary
during this mode of operation.
FEEDBACK Pin Short Detection
In the event the FEEDBACK pin voltage is below the VFB(OFF) threshold
at start-up, the secondary will complete the primary/secondary
handshake and will stop requesting pulses to initiate an auto-restart.
The secondary will stop requesting cycles for t ,AR(SK) to begin primary-
side auto-restart of tAR(OFF). In this condition, the total apparent AR
off-time is tAR(SK) + tAR(OFF). During normal operation, the secondary
will stop requesting pulses from the primary to initiate an auto-restart
cycle when the FEEDBACK pin voltage falls below VFB(OFF) threshold.
The deglitch filter on the VFB(OFF) is less than 10 msec. The secondary
will relinquish control after detecting the FEEDBACK pin is shorted to
ground.
OUTPUT VOLTAGE Pin Auto-Restart Threshold
The OUTPUT VOLTAGE pin includes a comparator to detect when the
output voltage falls below the VOUT(AR) threshold for a duration exceed-
ing t .VOUT(AR) The secondary controller will relinquish control when it
detects the OUTPUT VOLTAGE pin has fallen below VOUT(AR) for a time
duration longer than t .VOUT(AR) This threshold is meant to limit the
range of constant current (CC) operation.
Cable Drop Compensation (CDC)
The amount of cable drop compensation is a function of the load with
respect to the constant current regulation threshold as illustrated in
Figure 7 below.
φCD × VFB
VFB
Cable Drop
Compensation
No-Load
Load Current
Onset of CC
Regulation
PI-7417-110714
Figure 7. Cable Drop Compensation Characteristic.
The lower feedback pin resistor must be tied to the SECONDARY
GROUND pin (not ISENSE pin) to have output cable drop compensa-
tion enabled.
Cable drop compensation only applies for 5 V designs. Cable drop
compensation function is disabled for higher output voltage designs.
Output Constant Current Regulation
The InnoSwitch-CH regulates the output current through internal
sense across bond wires between the ISENSE and SECONDARY
GROUND pins. An external diode may be required across the
ISENSE-SECONDARY GROUND pins to limit the peak voltage across
the bond wire during fault condition. Larger output capacitance
especially at higher output voltages, the output capacitor discharge
into a short-circuited output can exceed the bond wire fusing current.
SR Disable Protection
On a cycle-by-cycle basis the SR is only engaged in the event a cycle
was requested by the secondary controller and the negative edge is
detected on the FORWARD pin. In the event the voltage on the
ISENSE pin exceeds approximately 3 times the ISV(TH) threshold, the
SR MOSFET drive is disabled until the surge current has diminished
to nominal levels.
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5
Rev. J 10/17