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STQ1NK80ZR-AP - STN1NK80Z
STD1NK80Z - STD1NK80Z-1
N-CHANNEL 800V - 13 - 1 A TO-92 /SOT-223/DPAK/IPAK
Zener - Protected SuperMESH™ MOSFET
Table 1: General Features
TYPE
VDSS RDS(on)
ID
Pw
STQ1NK80ZR-AP
STN1NK80Z
STD1NK80Z
STD1NK80Z-1
800 V
800 V
800 V
800 V
< 16
< 16
< 16
< 16
0.3 A
0.25A
1.0 A
1.0 A
3W
2.5 W
45 W
45 W
TYPICAL RDS(on) = 13
EXTREMELY HIGH dv/dt CAPABILITY
ESD IMPROVED CAPABILITY
100% AVALANCHE TESTED
NEW HIGH VOLTAGE BENCHMARK
GATE CHARGE MINIMIZED
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOS-
FETs including revolutionary MDmesh™ products.
Figure 1: Package
TO-92 (Ammopack)
2
3
2
1
SOT-223
3
1
DPAK
3
2
1
IPAK
Figure 2: Internal Schematic Diagram
APPLICATIONS
AC ADAPTORS AND BATTERY CHARGERS
SWITH MODE POWER SUPPLIES (SMPS)
Table 2: Order Codes
SALES TYPE
STQ1NK80ZR-AP
STN1NK80Z
STD1NK80ZT4
STD1NK80Z-1
MARKING
Q1NK80ZR
N1NK80Z
D1NK80Z
D1NK80Z
January 2006
PACKAGE
TO-92
SOT-223
DPAK
IPAK
PACKAGING
AMMOPAK
TAPE & REEL
TAPE & REEL
TUBE
Rev. 3
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STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
Table 3: Absolute Maximum ratings
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD (HBM-C= 100pF, R= 1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
Tj Operating Junction Temperature
Tstg Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD 1 A, di/dt 200 A/µs, VDD 640
Table 4: Thermal Data
Rthj-case Thermal Resistance Junction-case Max
Rthj-amb(#) Thermal Resistance Junction-ambient Max
Rthj-lead Thermal Resistance Junction-lead Max
Tl Maximum Lead Temperature For Soldering
Purpose
(#) When mounted on 1inch² FR-4 BOARD, 2 oz Cu
Table 5: Avalanche Characteristics
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
TO-92
0.3
0.19
3
0.025
Value
SOT-223
800
800
± 30
0.25
0.16
5
2.5
0.02
1000
4.5
Unit
DPAK/IPAK
V
V
V
1.0 A
0.63 A
A
45 W
0.36 W /°C
V
V/ns
-55 to 150
°C
TO-92
--
120
40
260
SOT-223
--
50
--
--
DPAK/IPAK
2.78
100
--
300
Unit
°C/W
°C/W
°C/W
°C
Max Value
1
50
Unit
A
mJ
Table 6: GATE-SOURCE ZENER DIODE
Symbol
Parameter
Test Conditions
BVGSO
Gate-Source Breakdown Igs=± 1mA (Open
Voltage
Drain)
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 7: On/Off
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
800
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20V
±10
VGS(th) Gate Threshold Voltage
VDS = VGS, ID = 50 µA
3 3.75 4.5
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 0.5 A
13 16
Unit
V
µA
µA
µA
V
Table 8: Dynamic
Symbol
Parameter
gfs (1) Forward Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Coss eq. (3) Equivalent Output
Capacitance
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDS = 15 V, ID = 0.5 A
VDS = 25 V, f = 1 MHz, VGS = 0
VGS = 0V, VDS = 0V to 640V
VDD = 400 V, ID = 0.5 A
RG = 4.7VGS = 10 V
(see Figure 21)
VDD = 640V, ID = 1.0 A,
VGS = 10V
(see Figure 24)
Min.
Typ.
0.8
160
26
6.7
Max.
Unit
S
pF
pF
pF
9.5 pF
8 ns
30 ns
22 ns
55 ns
7.7 nC
1.4 nC
4.5 nC
Table 9: Source Drain Diode
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
1.0 A
5A
VSD (1) Forward On Voltage
ISD = 1.0 A, VGS = 0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 1.0 A, di/dt = 100 A/µs
VDD = 50 V, Tj = 25°C
(see Figure 22)
365 ns
802 nC
4.4 A
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 1.0 A, di/dt = 100 A/µs
VDD = 50 V, Tj = 150°C
(see Figure 22)
388
802.7
4.6
ns
nC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS
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STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
Figure 3: Safe Operating Area for SOT-223
Figure 6: Thermal Impedance for SOT-223
Figure 4: Safe Operating Area for TO-92
Figure 7: Thermal Impedance for TO-92
Figure 5: Safe Operating Area for IPAK-DPAK
Figure 8: Thermal Impedance for DPAK-IPAK
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STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
Figure 9: Output Characteristics
Figure 12: Transfer Characteristics
Figure 10: Transconductance
Figure 13: Static Drain-source On Resistance
Figure 11: Gate Charge vs Gate-source Voltage Figure 14: Capacitance Variations
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