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Tempo Semiconductor, Inc.
FOUR CHANNEL HD AUDIO CODEC
OPTIMIZED FOR LOW POWER/LOW COST
DESCRIPTION
The 92HD95 is a low power optimized, high fidelity,
4-channel audio codec compatible with Intel’s High Defini-
tion (HD) Audio Interface. The 92HD95 provides high qual-
ity, HD Audio capability to notebook and desktop PC
applications.
FEATURES
• 4 Channel (2 stereo DACs, 2 stereo ADCs) with
24-bit resolution
• Microsoft WLP premium logo compliant
• 3W(4ohm)/1.5W(8ohm) Class-D Stereo BTL
Amplifier
• Selectable frequency hardware high-pass filter for
speaker protection.
• 10 band hardware parametric equalizer (5 bands per
channel) for speaker optimization in ALL operating
scenarios
• Hardware compressor limiter allows higher average
volume level without resonances or damage to
speakers.
• Integrated Class-G true capless stereo headphone
amplifier with charge pump/LDO
• 4 analog ports with port presence detect (3 single
ended, 1 BTL)
• Combo Jack Support allowing for dual-function
headphone and headset detection
• 2 Voltage adjustable VREF_Out pins for
microphone bias
• 2 Digital microphone inputs (4 mic support)
• Microphone Mute Input
• Selectable 1.5V and 3.3V HDA signaling
• Internal DVDD LDO voltage regulator
• Supports Runtime D3 (RTD3) low power mode
• Capable of MSLync Compliance
• Full HDA015-B and EuP low power support
• Audio inactivity transitions codec from D0 to D3 low
power mode
• Resume from D3 to D0 with audio activity in < 10 msec
• D3 to D0 transition with < -65dB pop/click
• Port presence detect in D3 with or without bit clock
• PC beep wake up in D3
• Additional vendor specific modes for even lower power
• 3.3 V analog power supply
• Digital and Analog PC Beep to all outputs
• 40-pin 5mm x 5mm QFN RoHS package
DATASHEET
92HD95
SOFTWARE SUPPORT
• Intuitive TSI HD Sound graphical user interface
that allows configurability and preference settings
• Output Path Processing
• 12 band fully parametric equalizer
• Compressor/limiter allows higher average volume level
without resonances or damage to speakers.
•Enables improved voice articulation
• Constant, system-level effects tuned to optimize a
particular platform can be combined with user-mode
“presets” tailored for specific acoustical environments
and applications
• System-level effects automatically disabled when
external audio connections made
• Input Path Processing
• 2 band fully parametric equalizer to allow for shaping of
microphone response
• Compressor/limiter allows higher average volume level
• Available near-field and far-field voice capture
algorithms to support conference room/lecture hall
applications
• Microphone Beam Forming, Acoustic Echo
Cancellation, and Noise Suppression
• TSI APO wrapper
• Enables multiple APOs to be used with the TSI Driver
• Dynamic Stream Switching
• Improved multi-streaming (Real Time Communication)
user experience with less support calls
• Broad 3rd party branded software including
Creative, Dolby, DTS, Waves, Sonic Focus & SRS
40 39 38 37 36 35 34 33 32 31
DVDD_CORE 1
30 AVDD2
DMIC_CLK/GPIO 1 2
DMIC_0/GPIO 2 3
DMIC_1/GPIO 0 4
Digital Mic
Interface
BTL BTL
Digital PWM controller
Stereo 5-band EQ
Highpass Filter
29 CPVreg
28 FCap1
27 FCap2
SDATA_OUT 5
Stereo
DAC 0
DAC0
MUX
26 VNeg
BITCLK 6
DVDDIO 7
SDATA_IN 8
DVDD 9
SYNC 10
Stereo
DAC 1
Stereo
ADC0
Stereo
ADC1
DAC1
DMIC0
DMIC1
DAC0
DAC1
DMIC0
DMIC1
DAC0
DAC1
DAC0
DAC1
MUX
25 VPos
HP 24 PORTA_R
HP 23 PORTA_L
22 AVDD1
21 CAP2
11 12 13 14 15 16 17 18 19 20
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TABLE OF CONTENTS
1. DESCRIPTION ...........................................................................................................................9
1.1. Overview ............................................................................................................................................ 9
1.2. Orderable Part Numbers .................................................................................................................... 9
2. DETAILED DESCRIPTION ......................................................................................................10
2.1. Port Functionality ............................................................................................................................. 10
2.1.1. Port Characteristics ............................................................................................................ 10
2.1.2. Vref_Out ............................................................................................................................. 11
2.1.3. Jack Detect ........................................................................................................................ 12
2.1.4. SPDIF Output ..................................................................................................................... 12
2.2. ADC Multiplexers ............................................................................................................................. 13
2.3. Power Management ......................................................................................................................... 13
2.4. AFG D0 ............................................................................................................................................ 14
2.5. AFG D1 ............................................................................................................................................ 14
2.6. AFG D2 ............................................................................................................................................ 15
2.7. AFG D3 ............................................................................................................................................ 15
2.7.1. AFG D3cold / RTD3 ........................................................................................................... 15
2.8. Vendor Specific Function Group Power States D4/D5 .................................................................... 15
2.9. 4.12 Vendor Specific Function Group Power State “D5 Kill” ........................................................... 16
2.10. Low-voltage HDA Signaling ........................................................................................................... 16
2.11. Multi-channel capture .................................................................................................................... 16
2.12. EAPD ............................................................................................................................................. 18
2.13. Digital Microphone Support ........................................................................................................... 21
2.14. Analog PC-Beep ............................................................................................................................ 25
2.15. Digital PC-Beep ............................................................................................................................. 27
2.16. Headphone Drivers ........................................................................................................................ 28
2.17. Class-D BTL Amplifier ................................................................................................................... 28
2.18. BTL Amplifier High-Pass Filter ....................................................................................................... 28
2.18.1. Filter Description .............................................................................................................. 29
2.19. EQ .................................................................................................................................................. 29
2.20. Combo Jack Detection ................................................................................................................... 29
2.21. GPIO .............................................................................................................................................. 30
2.21.1. GPIO Pin mapping and shared functions ......................................................................... 30
2.21.2. SPDIF/GPIO Selection ..................................................................................................... 30
2.21.3. Digital Microphone/GPIO Selection ................................................................................. 30
2.22. HD Audio HDA015-B support ........................................................................................................ 30
2.23. Digital Core Voltage Regulator ...................................................................................................... 31
2.24. Microphone Mute Input .................................................................................................................. 31
3. CHARACTERISTICS ...............................................................................................................32
3.1. Electrical Specifications ................................................................................................................... 32
3.1.1. Absolute Maximum Ratings ...............................................................................................32
3.1.2. Recommended Operating Conditions ................................................................................ 32
3.2. 92HD95 Analog Performance Characteristics ................................................................................. 33
3.3. Class-D BTL Amplifier Performance ................................................................................................ 36
3.4. Capless Headphone Supply Characteristics ................................................................................... 37
3.5. AC Timing Specs ............................................................................................................................. 37
3.5.1. HD Audio Bus Timing ......................................................................................................... 37
3.5.2. SPDIF Timing ..................................................................................................................... 38
3.5.3. Digital Microphone Timing ................................................................................................. 38
3.5.4. GPIO Characteristics ......................................................................................................... 38
4. FUNCTIONAL BLOCK DIAGRAM ...........................................................................................39
5. WIDGET DIAGRAM .................................................................................................................40
6. PORT AND PIN CONFIGURATIONS ......................................................................................41
6.1. Port Configurations .......................................................................................................................... 41
6.2. Pin Configuration Default Register Settings .................................................................................... 42
7. WIDGET INFORMATION .........................................................................................................43
7.1. Widget List ....................................................................................................................................... 44
7.2. Reset Key ........................................................................................................................................ 45
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7.3. Root (NID = 00h): VendorID ............................................................................................................ 45
7.3.1. Root (NID = 00h): VendorID .............................................................................................. 46
7.3.2. Root (NID = 00h): RevID .................................................................................................... 46
7.3.3. Root (NID = 00h): NodeInfo ............................................................................................... 47
7.4. AFG (NID = 01h): NodeInfo ............................................................................................................. 47
7.4.1. AFG (NID = 01h): FGType ................................................................................................. 48
7.4.2. AFG (NID = 01h): AFGCap ................................................................................................48
7.4.3. AFG (NID = 01h): PCMCap ............................................................................................... 49
7.4.4. AFG (NID = 01h): StreamCap ............................................................................................ 51
7.4.5. AFG (NID = 01h): InAmpCap ............................................................................................. 51
7.4.6. AFG (NID = 01h): PwrStateCap ......................................................................................... 52
7.4.7. AFG (NID = 01h): GPIOCnt ...............................................................................................53
7.4.8. AFG (NID = 01h): OutAmpCap .......................................................................................... 54
7.4.9. AFG (NID = 01h): PwrState ............................................................................................... 54
7.4.10. AFG (NID = 01h): UnsolResp .......................................................................................... 55
7.4.11. AFG (NID = 01h): GPIO ................................................................................................... 56
7.4.12. AFG (NID = 01h): GPIOEn .............................................................................................. 57
7.4.13. AFG (NID = 01h): GPIODir ..............................................................................................57
7.4.14. AFG (NID = 01h): GPIOWakeEn ..................................................................................... 58
7.4.15. AFG (NID = 01h): GPIOUnsol .......................................................................................... 59
7.4.16. AFG (NID = 01h): GPIOSticky ......................................................................................... 59
7.4.17. AFG (NID = 01h): SubID .................................................................................................. 60
7.4.18. AFG (NID = 01h): GPIOPlrty ............................................................................................61
7.4.19. AFG (NID = 01h): GPIODrive .......................................................................................... 62
7.4.20. AFG (NID = 01h): DMic .................................................................................................... 62
7.4.21. AFG (NID = 01h): DACMode ........................................................................................... 63
7.4.22. AFG (NID = 01h): ADCMode ........................................................................................... 64
7.4.23. AFG (NID = 01h): EAPD .................................................................................................. 65
7.4.24. AFG (NID = 01h): PortUse ............................................................................................... 66
7.4.25. AFG (NID = 01h): ComJack ............................................................................................. 67
7.4.26. AFG (NID = 01h): ComboJackTime ................................................................................. 68
7.4.27. AFG (NID = 01h): VSPwrState ........................................................................................ 70
7.4.28. AFG (NID = 01h): AnaPort ............................................................................................... 70
7.4.29. AFG (NID = 01h): AnaBeep ............................................................................................. 71
7.4.30. AFG (NID = 01h): AnaBTL ...............................................................................................72
7.4.31. AFG (NID = 01h): AnaBTLStatus ..................................................................................... 74
7.4.32. AFG (NID = 01h): AnaCapless ........................................................................................ 75
7.4.33. AFG (NID = 01h): Reset .................................................................................................. 78
7.5. PortA (NID = 0Ah): WCap ................................................................................................................ 79
7.5.1. PortA (NID = 0Ah): PinCap ................................................................................................ 80
7.5.2. PortA (NID = 0Ah): ConLst ................................................................................................ 81
7.5.3. PortA (NID = 0Ah): ConLstEntry0 ...................................................................................... 82
7.5.4. PortA (NID = 0Ah): ConSelectCtrl ...................................................................................... 82
7.5.5. PortA (NID = 0Ah): PwrState ............................................................................................. 83
7.5.6. PortA (NID = 0Ah): PinWCntrl ............................................................................................ 84
7.5.7. PortA (NID = 0Ah): UnsolResp .......................................................................................... 84
7.5.8. PortA (NID = 0Ah): ChSense .............................................................................................85
7.5.9. PortA (NID = 0Ah): EAPDBTLLR ....................................................................................... 85
7.5.10. PortA (NID = 0Ah): ConfigDefault .................................................................................... 86
7.6. PortB (NID = 0Bh): WCap ................................................................................................................ 89
7.6.1. PortB (NID = 0Bh): PinCap ................................................................................................ 90
7.6.2. PortB (NID = 0Bh): InAmpLeft ........................................................................................... 91
7.6.3. PortB (NID = 0Bh): InAmpRight ......................................................................................... 92
7.6.4. PortB (NID = 0Bh): PwrState ............................................................................................. 92
7.6.5. PortB (NID = 0Bh): PinWCntrl ............................................................................................ 93
7.6.6. PortB (NID = 0Bh): UnsolResp .......................................................................................... 94
7.6.7. PortB (NID = 0Bh): ChSense .............................................................................................94
7.6.8. PortB (NID = 0Bh): EAPDBTLLR ....................................................................................... 95
7.6.9. PortB (NID = 0Bh): ConfigDefault ...................................................................................... 95
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7.7. PortC (NID = 0Ch): WCap ............................................................................................................... 98
7.7.1. PortC (NID = 0Ch): PinCap ................................................................................................ 99
7.7.2. PortC (NID = 0Ch): InAmpLeft ......................................................................................... 100
7.7.3. PortC (NID = 0Ch): InAmpRight ....................................................................................... 101
7.7.4. PortC (NID = 0Ch): PwrState ........................................................................................... 101
7.7.5. PortC (NID = 0Ch): PinWCntrl ......................................................................................... 102
7.7.6. PortC (NID = 0Ch): UnsolResp ........................................................................................ 103
7.7.7. PortC (NID = 0Ch): ChSense ........................................................................................... 103
7.7.8. PortC (NID = 0Ch): EAPDBTLLR ..................................................................................... 104
7.7.9. PortC (NID = 0Ch): ConfigDefault .................................................................................... 104
7.8. PortD (NID = 0Dh): WCap ............................................................................................................. 107
7.8.1. PortD (NID = 0Dh): PinCap ..............................................................................................108
7.8.2. PortD (NID = 0Dh): ConLst ..............................................................................................109
7.8.3. PortD (NID = 0Dh): ConLstEntry0 .................................................................................... 110
7.8.4. PortD (NID = 0Dh): ConSelectCtrl ................................................................................... 110
7.8.5. PortD (NID = 0Dh): PwrState ........................................................................................... 111
7.8.6. PortD (NID = 0Dh): PinWCntrl ......................................................................................... 112
7.8.7. PortD (NID = 0Dh): EAPDBTLLR ..................................................................................... 112
7.8.8. PortD (NID = 0Dh): EsdRest ............................................................................................ 113
7.8.9. PortD (NID = 0Dh): ConfigDefault .................................................................................... 113
7.9. DMic0 (NID = 0Eh): WCap ............................................................................................................. 116
7.9.1. DMic0 (NID = 0Eh): PinCap ............................................................................................. 117
7.9.2. DMic0 (NID = 0Eh): InAmpLeft ........................................................................................ 118
7.9.3. DMic0 (NID = 0Eh): InAmpRight ...................................................................................... 119
7.9.4. DMic0 (NID = 0Eh): PwrState .......................................................................................... 119
7.9.5. DMic0 (NID = 0Eh): PinWCntrl ......................................................................................... 120
7.9.6. DMic0 (NID = 0Eh): ConfigDefault ................................................................................... 121
7.10. DMic1 (NID = 0Fh): WCap ........................................................................................................... 123
7.10.1. DMic1 (NID = 0Fh): PinCap ........................................................................................... 125
7.10.2. DMic1 (NID = 0Fh): InAmpLeft ...................................................................................... 126
7.10.3. DMic1 (NID = 0Fh): InAmpRight .................................................................................... 127
7.10.4. DMic1 (NID = 0Fh): PwrState ........................................................................................ 127
7.10.5. DMic1 (NID = 0Fh): PinWCntrl ....................................................................................... 128
7.10.6. DMic1 (NID = 0Fh): ConfigDefault ................................................................................. 128
7.11. DAC0 (NID = 10h): WCap ............................................................................................................ 131
7.11.1. DAC0 (NID = 10h): Cnvtr ...............................................................................................132
7.11.2. DAC0 (NID = 10h): OutAmpLeft .................................................................................... 133
7.11.3. DAC0 (NID = 10h): OutAmpRight .................................................................................. 134
7.11.4. DAC0 (NID = 10h): PwrState ......................................................................................... 134
7.11.5. DAC0 (NID = 10h): CnvtrID ........................................................................................... 135
7.11.6. DAC0 (NID = 10h): EAPDBTLLR ................................................................................... 136
7.12. DAC1 (NID = 11h): WCap ............................................................................................................ 136
7.12.1. DAC1 (NID = 11h): Cnvtr ...............................................................................................138
7.12.2. DAC1 (NID = 11h): OutAmpLeft .................................................................................... 139
7.12.3. DAC1 (NID = 11h): OutAmpRight .................................................................................. 139
7.12.4. DAC1 (NID = 11h): PwrState ......................................................................................... 140
7.12.5. DAC1 (NID = 11h): CnvtrID ........................................................................................... 141
7.12.6. DAC1 (NID = 11h): EAPDBTLLR ................................................................................... 141
7.13. ADC0 (NID = 12h): WCap ............................................................................................................ 142
7.13.1. ADC0 (NID = 12h): ConLst ............................................................................................ 143
7.13.2. ADC0 (NID = 15h): ConLstEntry0 .................................................................................. 144
7.13.3. ADC0 (NID = 15h): Cnvtr ...............................................................................................144
7.13.4. ADC0 (NID = 12h): ProcState ........................................................................................ 145
7.13.5. ADC0 (NID = 12h): PwrState ......................................................................................... 146
7.13.6. ADC0 (NID = 12h): CnvtrID ........................................................................................... 147
7.14. ADC1 (NID = 13h): WCap ............................................................................................................ 147
7.14.1. ADC1 (NID = 13h): ConLst ............................................................................................ 149
7.14.2. ADC1 (NID = 13h): ConLstEntry0 .................................................................................. 149
7.14.3. ADC1 (NID = 13h): Cnvtr ...............................................................................................150
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7.14.4. ADC1 (NID = 13h): ProcState ........................................................................................ 151
7.14.5. ADC1 (NID = 13h): PwrState ......................................................................................... 152
7.14.6. ADC1 (NID = 1Bh): CnvtrID ........................................................................................... 153
7.15. ADC0Mux (NID = 14h): WCap ..................................................................................................... 153
7.15.1. ADC0Mux (NID = 14h): ConLst ..................................................................................... 155
7.15.2. ADC0Mux (NID = 14h): ConLstEntry4 ........................................................................... 155
7.15.3. ADC0Mux (NID = 14h): ConLstEntry0 ........................................................................... 156
7.15.4. ADC0Mux (NID = 14h): OutAmpCap ............................................................................. 156
7.15.5. ADC0Mux (NID = 14h): OutAmpLeft .............................................................................. 157
7.15.6. ADC0Mux (NID = 14h): OutAmpRight ........................................................................... 157
7.15.7. ADC0Mux (NID = 14h): ConSelectCtrl ........................................................................... 158
7.15.8. ADC0Mux (NID = 14h): PwrState .................................................................................. 158
7.15.9. ADC0Mux (NID = 14h): EAPDBTLLR ............................................................................ 159
7.16. ADC1Mux (NID = 15h): WCap ..................................................................................................... 160
7.16.1. ADC1Mux (NID = 15h): ConLst ..................................................................................... 161
7.16.2. ADC1Mux (NID = 15h): ConLstEntry4 ........................................................................... 162
7.16.3. ADC1Mux (NID = 15h): ConLstEntry0 ........................................................................... 162
7.16.4. ADC1Mux (NID = 15h): OutAmpCap ............................................................................. 163
7.16.5. ADC1Mux (NID = 15h): OutAmpLeft .............................................................................. 163
7.16.6. ADC1Mux (NID = 15h): OutAmpRight ........................................................................... 164
7.16.7. ADC1Mux (NID = 15h): ConSelectCtrl ........................................................................... 164
7.16.8. ADC1Mux (NID = 15h): PwrState .................................................................................. 165
7.16.9. ADC1Mux (NID = 15h): EAPDBTLLR ............................................................................ 166
7.17. PortMux (NID = 16h): WCap ........................................................................................................ 166
7.17.1. PortMux (NID = 16h): ConLst ........................................................................................ 168
7.17.2. PortMux (NID = 16h): ConLstEntry0 .............................................................................. 168
7.17.3. PortMux (NID = 16h): ConSelectCtrl .............................................................................. 169
7.17.4. PortMux (NID = 16h): PwrState ..................................................................................... 169
7.18. SPDIFOut0 (NID = 17h): WCap ................................................................................................... 170
7.18.1. SPDIFOut0 (NID = 17h): PCMCap ................................................................................ 171
7.18.2. SPDIFOut0 (NID = 17h): StreamCap ............................................................................. 173
7.18.3. SPDIFOut0 (NID = 17h): OutAmpCap ........................................................................... 173
7.18.4. SPDIFOut0 (NID = 17h): Cnvtr ...................................................................................... 174
7.18.5. SPDIFOut0 (NID = 17h): OutAmpLeft ............................................................................ 175
7.18.6. SPDIFOut0 (NID = 17h): OutAmpRight ......................................................................... 176
7.18.7. SPDIFOut0 (NID = 1Dh): PwrState ................................................................................ 176
7.18.8. SPDIFOut0 (NID = 17h): CnvtrID ................................................................................... 177
7.18.9. SPDIFOut0 (NID = 17h): DigCnvtr ................................................................................. 178
7.19. Dig0Pin (NID = 18h): WCap ......................................................................................................... 179
7.19.1. Dig0Pin (NID = 18h): PinCap ......................................................................................... 180
7.19.2. Dig0Pin (NID = 18h): ConLst ......................................................................................... 181
7.19.3. Dig0Pin (NID = 18h): ConLstEntry0 ............................................................................... 182
7.19.4. Dig0Pin (NID = 18h): PwrState ...................................................................................... 182
7.19.5. Dig0Pin (NID = 18h): PinWCntrl ..................................................................................... 183
7.19.6. Dig0Pin (NID = 18h): UnsolResp .................................................................................. 184
7.19.7. Dig0Pin (NID = 18h): ChSense ...................................................................................... 184
7.19.8. Dig0Pin (NID = 18h): ConfigDefault ............................................................................... 185
7.20. DigBeep (NID = 19h): WCap ....................................................................................................... 187
7.20.1. DigBeep (NID = 19h): OutAmpCap ................................................................................ 188
7.20.2. DigBeep (NID = 19h): OutAmpLeft ................................................................................ 189
7.20.3. DigBeep (NID = 19h): PwrState ..................................................................................... 190
7.20.4. DigBeep (NID = 19h): Gen ............................................................................................. 190
7.20.5. DigBeep (NID = 19h): Gain ............................................................................................ 191
7.21. AdvancedFunctions (NID = 1Ah): WCap ..................................................................................... 191
7.21.1. AdvancedFunctions (NID = 1Ah): Cntrl0 ........................................................................ 193
7.21.2. AdvancedFunctions (NID = 1Ah): Cntrl1 ........................................................................ 193
7.21.3. AdvancedFunctions (NID = 1Ah): Cntrl2 ........................................................................ 194
7.21.4. AdvancedFunctions (NID = 1Ah): Cntrl3 ........................................................................ 194
8. PINOUT AND PACKAGING ..................................................................................................208
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