Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and out of
the device. It is an open drain output and may be wire-ORed
with any number of open drain or open collector outputs. An
open drain output requires the use of a pull-up resistor. For
selecting typical values, refer to the guidelines for calculating
typical values on the bus pull-up resistors graph.
The Address inputs are used to set the least significant
4-bits of the 8-bit slave address. A match in the slave address
serial data stream must be made with the Address input in
order to initiate communication with the X9241A.
VH/RH(VH0/RH0 TO VH3/RH3), VL/RL (VL0/RL0 TO VL3/RL3)
The RH and RL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW/RW (VW0/RW0 TO VW3/RW3)
The wiper outputs are equivalent to the wiper output of a
(20 LD DIP, SOIC, TSSOP)
A0 to A3
FN8164 Rev 7.00
August 17, 2015
VH0/RH0 to VH3/RH3,
VL0/RL0 to VL3/RL3
VW0/RW0 to VW3/RW3
Potentiometer Pins (terminal equivalent)
Potentiometer Pins (wiper equivalent)
Principles of Operation
The X9241A is a highly integrated microcircuit incorporating
four resistor arrays, their associated registers and counters
and the serial interface logic providing direct communication
between the host and the XDCP potentiometers.
The X9241A supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the bus
as a transmitter and the receiving device as the receiver. The
device controlling the transfer is a master and the device being
controlled is the slave. The master will always initiate data
transfers and provide the clock for both transmit and receive
operations. Therefore, the X9241A will be considered a slave
device in all applications.
Clock and Data Conventions
Data states on the SDA line can change only during SCL LOW
periods (tLOW). SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions.
All commands to the X9241A are preceded by the start
condition, which is a HIGH to LOW transition of SDA while SCL
is HIGH (tHIGH). The X9241A continuously monitors the SDA
and SCL lines for the start condition and will not respond to any
command until this condition is met.
All communications must be terminated by a stop condition,
which is a LOW to HIGH transition of SDA while SCL is HIGH.
Acknowledge is a software convention used to provide a
positive handshake between the master and slave devices on
the bus to indicate the successful receipt of data. The
transmitting device, either the master or the slave, will release
the SDA bus after transmitting 8-bits. The master generates a
ninth clock cycle and during this period the receiver pulls the
SDA line LOW to acknowledge that it successfully received the
8-bits of data. See Figure 7.
The X9241A will respond with an acknowledge after
recognition of a start condition and its slave address and once
again after successful receipt of the command byte. If the
command is followed by a data byte the X9241A will respond
with a final acknowledge.
The X9241A is comprised of four resistor arrays. Each array
contains 63 discrete resistive segments that are connected in
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