Serial Output (SO)
SO is a serial data output pin. During a read cycle, data
is shifted out on this pin. Data is clocked out by the
falling edge of the serial clock.
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
Chip Select (CS)
When CS is HIGH, the X9250 is deselected and the SO
pin is at high impedance, and (unless an internal write
cycle is underway) the device will be in the standby
state. CS LOW enables the X9250, placing it in the
active power mode. It should be noted that after a
power-up, a HIGH to LOW transition on CS is required
prior to the start of any operation.
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause the
serial communication with the controller without resetting
the serial sequence. To pause, HOLD must be brought
LOW while SCK is LOW. To resume communication,
HOLD is brought HIGH, again while SCK is LOW. If the
pause feature is not used, HOLD should be held HIGH
at all times.
Device Address (A0 - A1)
The address inputs are used to set the least significant 2
bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with the
X9250. A maximum of 4 devices may occupy the SPI
VH/RH (VH0/RH0 - VH3/RH3), VL/RL (VL0/RL0 - VL3/RL3)
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer.
VW/RW (VW0/RW0 - VW3/RW3)
The wiper pins are equivalent to the wiper terminal of a
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
Analog Supplies (V+, V-)
The analog supplies V+, V- are the supply voltages for
the XDCP analog section.
7 X9250 18
Hardware Write Protection
System Supply Voltage
August 29, 2006
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