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DATASHEET
X9111
Single Supply/Low Power/1024-Tap/SPI Bus/Single Digitally-Controlled (XDCP™)
Potentiometer
FN8159
Rev 5.00
October 13, 2016
The X9111 integrates a single, digitally controlled
potentiometer (XDCP) on a monolithic CMOS integrated circuit.
The digital controlled potentiometer is implemented using
1023 resistive elements in a series array. Between each
element are tap points connected to the wiper terminal
through switches. The position of the wiper on the array is
controlled by the user through the SPI bus interface. The
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and four nonvolatile Data Registers that can be
directly written to and read by the user. The contents of the
WCR control the position of the wiper on the resistor array
through the switches. Power-up recalls the contents of the
default data register (DR0) to the WCR.
The XDCP can be used as a 3-terminal potentiometer or as a
2-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal
processing.
Features
• 1024 resistor taps – 10-bit resolution
• SPI serial interface for write, read, and transfer operations of
the potentiometer
• Wiper resistance, 40Ω typical at 5V
• Four nonvolatile Data Registers
• Nonvolatile storage of multiple wiper positions
• Power-on recall, loads saved wiper position on power-up
• Standby current <3µA maximum
• VCC: 2.7V to 5.5V operation
• 100kΩ end-to-end resistance
• 100-year data retention
• Endurance: 100,000 data changes per bit per register
• 14 Ld TSSOP
• Low-power CMOS
• Single supply version of the X9110
• Pb-Free (RoHS compliant)
VCC
RH
SPI
BUS
INTERFACE
ADDRESS
DATA
STATUS
BUS
INTERFACE
AND
CONTROL
WRITE
READ
TRANSFER
CONTROL
POWER-ON RECALL
WIPER COUNTER
REGISTER (WCR)
DATA REGISTERS
(DR0-DR3)
WIPER
100kΩ
1024-taps
POT
VSS
NC
FIGURE 1. FUNCTIONAL DIAGRAM
RW RL
FN8159 Rev 5.00
October 13, 2016
Page 1 of 19

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X9111
Circuit Level Applications
• Vary the gain of a voltage amplifier
• Provide programmable DC reference voltages for comparators
and detectors
• Control the volume in audio circuits
• Trim out the offset voltage error in a voltage amplifier circuit
• Set the output voltage of a voltage regulator
• Trim the resistance in Wheatstone bridge circuits
• Control the gain, characteristic frequency, and Q-factor in filter
circuits
• Set the scale factor and zero point in sensor signal
conditioning circuits
• Vary the frequency and duty cycle of timer ICs
• Vary the DC biasing of a pin diode attenuator in RF circuits
• Provide a control variable (I, V, or R) in feedback circuits
System Level Applications
• Adjust the contrast in LCD displays
• Control the power level of LED transmitters in communication
systems
• Set and regulate the DC biasing point in an RF power amplifier
in wireless systems
• Control the gain in audio and home entertainment systems
• Provide the variable DC bias for tuners in RF wireless systems
• Set the operating points in temperature control systems
• Control the operating point for sensors in industrial systems
• Trim offset and gain errors in artificial intelligent systems
Ordering Information
PART NUMBER
(Notes 2, 3)
X9111TV14IZ
PART
MARKING
X9111TV ZI
VCC LIMITS (V)
5 ±10%
POTENTIOMETER
ORGANIZATION
(kΩ)
100
TEMP RANGE
(°C)
PACKAGE
(RoHS COMPLIANT)
-40 to +85 14 Ld TSSOP (4.4mm)
PKG.
DWG. #
M14.173
X9111TV14Z
X9111TV Z
0 to +70 14 Ld TSSOP (4.4mm)
M14.173
X9111TV14Z-2.7
X9111TV ZF
2.7 to 5.5
0 to +70 14 Ld TSSOP (4.4mm)
M14.173
X9111TV14IZ-2.7 (Note 1) X9111TV ZG
-40 to +85 14 Ld TSSOP (4.4mm)
M14.173
NOTES:
1. Add “T1” suffix for 2.5k unit tape and reel option.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see product information page for X9111. For more information on MSL, see tech brief TB363.
Detailed Functional Diagram
VCC
HOLD
CS
SCK
SO
SI
A0
A1
WP
INTERFACE
AND
CONTROL
CIRCUITRY
Data
Control
POWER-ON
RECALL
DR0 DR1
DR2 DR3
WIPER
COUNTER
REGISTER
(WCR)
100kΩ
1024-taps
RH
RL
RW
VSS
FIGURE 2. DETAILED FUNCTIONAL DIAGRAM
FN8159 Rev 5.00
October 13, 2016
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X9111
Pin Configuration
X9111
(14 LD TSSOP)
TOP VIEW
SO
A0
NC
CS
SCK
SI
VSS
1
2
3
4
5
6
7
14 VCC
13 RL
12 RH
11 RW
10 HOLD
9 A1
8 WP
Pin Descriptions
PIN
(TSSOP)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYMBOL
SO
A0
NC
CS
SCK
SI
VSS
WP
A1
HOLD
RW
RH
RL
VCC
FUNCTION
Serial Data Output
Device Address
No Connect
Chip Select
Serial Clock
Serial Data Input
System Ground
Hardware Write Protect
Device Address
Device Select. Pause the Serial Bus
Wiper Terminal of the Potentiometer
High Terminal of the Potentiometer
Low Terminal of the Potentiometer
System Supply Voltage
Bus Interface Pins
SERIAL OUTPUT (SO)
SO is a serial data output pin. During a read cycle, data is shifted
out on this pin. Data is clocked out by the falling edge of the serial
clock.
SERIAL INPUT (SI)
SI is the serial data input pin. All opcodes, byte addresses and data
to be written to the pots and pot registers are input on this pin.
Data is latched by the rising edge of the serial clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the X9111.
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the device.
Once the part is selected and a serial sequence is underway,
HOLD may be used to pause the serial communication with the
controller without resetting the serial sequence. To pause, HOLD
must be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while SCK is LOW.
If the pause feature is not used, HOLD should be held HIGH at all
times.
DEVICE ADDRESS (A0, A1)
The address inputs are used to set the 8-bit slave address. A
match in the slave address serial data stream must be made
with the address input (A1–A0) in order to initiate
communication with the X9111.
CHIP SELECT (CS)
When CS is HIGH, the X9111 is deselected and the SO pin is at
high impedance, and (unless an internal write cycle is underway)
the device will be in the standby state. CS LOW enables the
X9111, placing it in the active power mode. It should be noted
that after a power-up, a HIGH to LOW transition on CS is required
prior to the start of any operation.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to the Data
Registers.
Potentiometer Pins
RH, RL
The RH and RL pins are equivalent to the terminal connections on a
mechanical potentiometer.
RW
The wiper pin is equivalent to the wiper terminal of a mechanical
potentiometer.
Bias Supply Pins
SYSTEM SUPPLY VOLTAGE (VCC) AND SUPPLY
GROUND (VSS)
The VCC pin is the system supply voltage. The VSS pin is the
system ground.
Other Pins
NO CONNECT (NC)
Pin should be left open. This pin is used for Intersil
manufacturing and test purposes.
FN8159 Rev 5.00
October 13, 2016
Page 3 of 19