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DATASHEET
X9119
1024 Tap, Low Power, 2-Wire Interface, Digitally Controlled (XDCP™)
Potentiometer
FN8162
Rev 5.00
July 5, 2016
The X9119 integrates a single digitally controlled
potentiometer (XDCP™) on a monolithic CMOS integrated
circuit.
The digital controlled potentiometer is implemented using
1023 resistive elements in a series array. Between each
element are tap points connected to the wiper terminal
through switches. The position of the wiper on the array is
controlled by the user through the 2-wire bus interface. The
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and four nonvolatile data registers that can be
directly written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor array
through the switches. Power-up recalls the contents of the
default data register (DR0) to the WCR.
The XDCP™ can be used as a 3-terminal potentiometer or as a
2-terminal variable resistor in a wide variety of applications
including control, parameter adjustments and signal
processing.
Features
• 1024 resistor taps – 10-bit resolution
• 2-Wire serial interface for write, read, and
transfer operations of the potentiometer
• Wiper resistance, 40Ω typical at VCC = 5V
• Four nonvolatile data registers
• Nonvolatile storage of multiple wiper positions
• Power-on recall, loads saved wiper position on power-up.
• Standby current <3µA maximum
• VCC: 2.7V to 5.5V operation
• 100kΩ end-to-end resistance
• 100 yr. data retention
• Endurance: 100,000 data changes per bit per register
• 14 Ld TSSOP
• Low power CMOS
• Single supply version of the X9118
• Pb-free available (RoHS compliant)
VCC
RH
2-WIRE
BUS
INTERFACE
ADDRESS
DATA
STATUS
BUS
INTERFACE
AND
CONTROL
WRITE
READ
TRANSFER
CONTROL
POWER-ON RECALL
WIPER COUNTER
REGISTER (WCR)
DATA REGISTERS
(DR0-DR3)
WIPER
100kΩ
1024-TAPS
POT
VSS NC NC
FIGURE 1. FUNCTIONAL DIAGRAM
RW RL
FN8162 Rev 5.00
July 5, 2016
Page 1 of 18

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X9119
Applications
Circuit Level
• Vary the gain of a voltage amplifier
• Provide programmable DC reference voltages for comparators
and detectors
• Control the volume in audio circuits
• Trim out the offset voltage error in a voltage amplifier circuit
• Set the output voltage of a voltage regulator
• Trim the resistance in Wheatstone bridge circuits
• Control the gain, characteristic frequency and Q-factor in filter
circuits
• Set the scale factor and zero point in sensor signal
conditioning circuits
• Vary the frequency and duty cycle of timer ICs
• Vary the DC biasing of a pin diode attenuator in RF circuits
• Provide a control variable (I, V, or R) in feedback circuits
Ordering Information
System Level
• Adjust the contrast in LCD displays
• Control the power level of LED transmitters in communication
systems
• Set and regulate the DC biasing point in an RF power amplifier
in wireless systems
• Control the gain in audio and home entertainment systems
• Provide the variable DC bias for tuners in RF wireless systems
• Set the operating points in temperature control systems
• Control the operating point for sensors in industrial systems
• Trim offset and gain errors in artificial intelligent
systems
PART NUMBER
(Notes 2, 3)
VCC LIMITS
PART MARKING
(V)
POTENTIOMETER
ORGANIZATION
(kΩ)
TEMP
RANGE
(°C)
PACKAGE
RoHS COMPLIANT
PKG. DWG.#
X9119TV14IZ
X9119 TVZI
5 ±10%
100 -40 to +85 14 Ld TSSOP (4.4mm)
M14.173
X9119TV14Z
X9119 TVZ
0 to +70 14 Ld TSSOP (4.4mm)
M14.173
X9119TV14Z-2.7
X9119 TVZF
2.7 to 5.5
0 to +70 14 Ld TSSOP (4.4mm)
M14.173
X9119TV14IZ-2.7 (Note 1) X9119 TVZG
-40 to +85 14 Ld TSSOP (4.4mm)
M14.173
NOTES:
1. Add “T1” suffix for 2.5k unit tape and reel option.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for X9119. For more information on MSL, please see tech brief TB363.
VCC
SCL
SDA
A2
A1
A0
WP
INTERFACE
AND
CONTROL
CIRCUITRY
DATA
CONTROL
POWER ON
RECALL
DR0 DR1
DR2 DR3
WIPER
COUNTER
REGISTER
(WCR)
100kΩ
1024-TAPS
RH
RL
RW
FN8162 Rev 5.00
July 5, 2016
VSS
FIGURE 2. DETAILED FUNCTIONAL DIAGRAM
Page 2 of 18

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X9119
Pin Configuration
X9119
(14 LD TSSOP)
TOP VIEW
NC
A0
NC
A2
SCL
SDA
VSS
1
2
3
4
5
6
7
14 VCC
13 RL
12 RH
11 RW
10 NC
9 A1
8 WP
Pin Assignments
PIN
NUMBER
1, 3, 10
2
4
5
6
7
8
9
11
12
13
14
PIN NAME
FUNCTION
NC No connect
A0 Device address for 2-wire bus
A2 Device address for 2-wire bus
SCL Serial clock for 2-wire bus
SDA Serial data input/output for 2-wire bus
VSS System ground
WP Hardware write protect
A1 Device address for 2-wire bus
RW Wiper terminal of the potentiometer
RH High terminal of the potentiometer
RL Low terminal of the potentiometer
VCC System supply voltage
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for a
2-wire slave device and is used to transfer data into and out of
the device. It receives device address, opcode, wiper register
address and data sent from a 2-wire master at the rising edge of
the serial clock SCL, and it shifts out data after each falling edge
of the serial clock SCL.
It is an open-drain output and may be wire-ORed with any
number of open-drain or open collector outputs. An open-drain
output requires the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical values on the
bus pull-up resistors graph.
SERIAL CLOCK (SCL)
This input is used by a 2-wire master to supply a 2-wire serial
clock to the X9119.
DEVICE ADDRESS (A2–A0)
The Address inputs are used to set the least significant 3 bits of
the 8-bit slave address. A match in the slave address serial data
stream must be made with the Address input in order to initiate
communication with the X9119. A maximum of 8 devices may
occupy the 2-wire serial bus.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW, prevents nonvolatile writes to the Data
Registers.
Potentiometer Pins
RH, RL
The RH and RL pins are equivalent to the terminal connections on
a mechanical potentiometer.
RW
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer.
Bias Supply Pins
SYSTEM SUPPLY VOLTAGE (VCC) AND SUPPLY
GROUND (VSS)
The VCC pin is the system supply voltage. The VSS pin is the
system ground.
Other Pins
NO CONNECT
No connect pins should be left open. These pins are used for
Intersil manufacturing and testing purposes.
Principals of Operation
The X9119 is an integrated microcircuit incorporating a resistor
array and its associated registers and counters and the serial
interface logic providing direct communication between the host
and the digitally controlled potentiometer. This section provides
detail description of the following:
• Resistor Array Description
• Serial Interface Description
• Instruction and Register Description
Resistor Array Description
The X9119 is comprised of a resistor array. The array contains, in
effect, 1023 discrete resistive segments that are connected in
series (Figure 3 on page 4). The physical ends of each array are
equivalent to the fixed terminals of a mechanical potentiometer
(RH and RL inputs).
At both ends of each array and between each resistor segment is
a CMOS switch connected to the wiper (RW) output. Within each
individual array only one switch may be turned on at a time.
These switches are controlled by the Wiper Counter Register
(WCR). The 10-bits of the WCR (WCR[9:0]) are decoded to select,
and enable, one of 1024 switches.
FN8162 Rev 5.00
July 5, 2016
Page 3 of 18