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a
FEATURES
Fast 16-Bit ADC
200 kSPS Throughput – AD976A
100 kSPS Throughput – AD976
Single 5 V Supply Operation
Input Range: ؎10 V
100 mW Max Power Dissipation
Choice of External or Internal 2.5 V Reference
High Speed Parallel Interface
On-Chip Clock
28-Lead Skinny DIP, SSOP or SOIC Packages
16-Bit, 100 kSPS/200 kSPS
BiCMOS A/D Converters
AD976/AD976A
CAP
VIN
AGND2
VDIG
FUNCTIONAL BLOCK DIAGRAM
REF
VANA AGND1
R
4R
4R
3
4k
2.5V
REFERENCE
AD976/AD976A
SWITCHED
CAP ADC
PARALLEL
INTERFACE
CLOCK
CONTROL LOGIC &
INTERNAL CALIBRATION CIRCUITRY
DGND
R = 6kAD976
R = 3kAD976A
BYTE
R/C
CS BUSY
D15
D0
GENERAL DESCRIPTION
The AD976/AD976A is a high speed, low power 16-bit A/D
converter that operates from a single 5 V supply. The part con-
tains a successive approximation, switched capacitor ADC, an
internal 2.5 V reference and a high speed parallel interface. The
ADC is factory calibrated to minimize all linearity errors. The
analog full-scale input is the standard industrial range of ± 10 V.
The AD976/AD976A is comprehensively tested for ac param-
eters such as SNR and THD, as well as the more traditional
parameters of offset, gain and linearity.
The AD976/AD976A is fabricated on Analog Devices’ propri-
etary BiCMOS process, which has high performance bipolar
devices along with CMOS transistors.
The AD976/AD976A is available in skinny 28-lead DIP, SSOP
and SOIC packages.
PRODUCT HIGHLIGHTS
1. Fast Throughput.
The AD976/AD976A is a high speed (100 kSPS/200 kSPS
throughput rates respectively), 16-bit ADC based on a
switched capacitor architecture.
2. Single-Supply Operation.
The AD976/AD976A operates from a single 5 V supply and
dissipates only 100 mW max.
3. Comprehensive DC and AC Specifications.
The AD976/AD976A is factory calibrated and fully tested for
SNR and THD as well as the traditional specifications of
offset, gain and linearity.
4. Complete A/D Solution.
The AD976/AD976A offers a highly integrated solution
containing an accurate ADC, reference and on-chip clock.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999

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AD976/AD976A
AD976A–SPECIFICATIONS (–40؇C to +85؇C, FS = 200 kHz, Ref = Internal Reference, VDIG = VANA = +5 V unless
otherwise noted)
Parameter
AD976AA
Min Typ Max
AD976AB
Min Typ Max
AD976AC
Min Typ Max
Units
RESOLUTION
16
16
16 Bits
ANALOG INPUT
Voltage Range
Impedance
Capacitance
± 10 ± 10
13 13
22 22
± 10 V
13 k
22 pF
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
5 5 5 µs
200 200 200 kHz
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise2
Full-Scale Error3, 4
Full-Scale Error Drift
Full-Scale Error, Ext. REF = 2.5 V
Full-Scale Error Drift, Ext. REF = 2.5 V
Bipolar Zero Error4
Bipolar Zero Error Drift
Power Supply Sensitivity
VANA = VDIG = VD = 5 V ± 5%
AC ACCURACY
Spurious Free Dynamic Range5
Total Harmonic Distortion5
Signal to (Noise + Distortion)5
–60 dB Input
Signal to Noise5
Full-Power Bandwidth7
Input Bandwidth
–2
15
90
83
83
1.0
±7
±2
±2
27
1
2.7
±3
+3
± 0.5
± 0.5
± 10
±8
–90
–1
16
1.0
±7
±2
±2
96
85
28
85
1
2.7
±2
+1.75
± 0.25
± 0.25
± 10
±8
–96
±3
±2
15
1.0
± 0.5
±7
± 0.5
±2
± 15
±2
±8
90
–90
83
27
83
1
2.7
LSB1
LSB
Bit
LSB
%
ppm/°C
%
ppm/°C
mV
ppm/°C
LSB
dB6
dB
dB
dB
dB
MHz
MHz
SAMPLING DYNAMICS
Aperture Delay
Transient Response
Full-Scale Step
Overvoltage Recovery8
40
1
150
40
1
150
40
1
150
ns
µs
ns
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
Ext. REF = 2.5 V
2.48 2.5
1
2.3 2.5
2.52
2.7
100
2.48 2.5
1
2.3 2.5
2.52
2.7
100
2.48 2.5 2.52
1
2.3 2.5 2.7
100
V
µA
V
µA
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
IIH
–0.3
+2.0
+0.8
VDIG + 0.3
± 10
± 10
–0.3
+2.0
+0.8
VDIG + 0.3
± 10
± 10
–0.3
+2.0
+0.8
VDIG + 0.3
± 10
± 10
V
V
µA
µA
NOTES
1LSB means least significant bit. With a ± 10 V input, one LSB is 305 µV.
2Typical rms noise at worst case transitions and temperatures.
3Measured with fixed resistors as shown in Figure 5 (AD976) and Figure 6 (AD976A). Adjustable to zero as shown in Figure 7.
4Full-scale error is expressed as the % difference between the actual full-scale code transition voltage and the ideal full-scale transition voltage and includes the effect
of offset error. The full-scale error is the worst case of either the –full-scale or +full-scale code transition voltage errors.
5fIN = 20 kHz (AD976) and fIN = 45 kHz (AD976A), 0.5 dB down, unless otherwise noted.
6All specifications in dB are referred to a full scale ± 10 V input.
7Full-power bandwidth is defined as full-scale input frequency at which signal-to-(noise + distortion) degrades to 60 dB or 10 bits of accuracy.
8Recovers to specified performance after a 2 × FS input overvoltage.
Specifications subject to change without notice.
–2– REV. C

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AD976–SPECIFICATIONS (–40؇C to +85؇C, FS = 100 kHz, Ref = Internal Reference,
VDIG = VANA = +5 V unless otherwise noted)
AD976/AD976A
Parameter
AD976A
Min Typ Max
AD976B
Min Typ Max
AD976C
Min Typ Max
Units
RESOLUTION
16
16
16 Bits
ANALOG INPUT
Voltage Range
Impedance
Capacitance
± 10 ± 10
23 23
22 22
± 10 V
23 k
22 pF
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
10 10 10 µs
100 100 100 kHz
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise2
Full-Scale Error3, 4
Full-Scale Error Drift
Full-Scale Error, Ext. REF = 2.5 V
Full-Scale Error Drift, Ext. REF = 2.5 V
Bipolar Zero Error4
Bipolar Zero Error Drift
Power Supply Sensitivity
VANA = VDIG = VD = 5 V ± 5%
–2
15
1.0
±7
±2
±2
±3
+3
± 0.5
± 0.5
± 10
±8
AC ACCURACY
Spurious Free Dynamic Range5
Total Harmonic Distortion5
Signal to (Noise + Distortion)5
–60 dB Input
Signal to Noise5
Full-Power Bandwidth7
Input Bandwidth
90
83
27
83
700
1.5
–90
–1
16
1.0
±7
±2
±2
96
85
28
85
700
1.5
±2
+1.75
± 0.25
± 0.25
± 10
±8
–96
±3
±2
15
1.0
± 0.5
±7
± 0.5
±2
± 15
±2
±8
90
–90
83
27
83
700
1.5
LSB1
LSB
Bit
LSB
%
ppm/°C
%
ppm/°C
mV
ppm/°C
LSB
dB6
dB
dB
dB
dB
kHz
MHz
SAMPLING DYNAMICS
Aperture Delay
Transient Response
Full-Scale Step
Overvoltage Recovery8
40
2
150
40
2
150
40
2
150
ns
µs
ns
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
Ext. REF = 2.5 V
2.48 2.5
1
2.3 2.5
2.52
2.7
100
2.48 2.5
1
2.3 2.5
2.52
2.7
100
2.48 2.5 2.52
1
2.3 2.5 2.7
100
V
µA
V
µA
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
IIH
–0.3
+2.0
+0.8
VDIG + 0.3
± 10
± 10
–0.3
+2.0
+0.8
VDIG + 0.3
± 10
± 10
–0.3
+2.0
+0.8
VDIG + 0.3
± 10
± 10
V
V
µA
µA
NOTES
1LSB means least significant bit. With a ± 10 V input, one LSB is 305 µV.
2Typical rms noise at worst case transitions and temperatures.
3Measured with fixed resistors as shown in Figure 5 (AD976) and Figure 6 (AD976A). Adjustable to zero as shown in Figure 7.
4Full-scale error is expressed as the % difference between the actual full-scale code transition voltage and the ideal full-scale transition voltage and includes the effect
of offset error. The full-scale error is the worst case of either the –full-scale or +full-scale code transition voltage errors.
5fIN = 20 kHz (AD976) and fIN = 45 kHz (AD976A), 0.5 dB down, unless otherwise noted.
6All specifications in dB are referred to a full scale ± 10 V input.
7Full-power bandwidth is defined as full-scale input frequency at which signal-to-(noise + distortion) degrades to 60 dB or 10 bits of accuracy.
8Recovers to specified performance after a 2 × FS input overvoltage.
Specifications subject to change without notice.
REV. C
–3–

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AD976/AD976A
Parameter
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
VOH
Leakage Current
Output Capacitance
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
POWER SUPPLIES
Specified Performance
VDIG
VANA
IDIG
IANA
Power Dissipation
TEMPERATURE RANGE
Specified Performance
Specifications subject to change without notice.
Conditions
ISINK = 1.6 mA
ISOURCE = 500 µA
High-Z State,
VOUT = 0 V to VDIG
High-Z State
All Grades
Min Typ
Max
Parallel 16 Bits
Binary Twos Complement
+0.4
+4
±5
15
83
83
4.75 5
4.75 5
3.0
11
–40
5.25
5.25
100
+85
Units
V
V
µA
pF
ns
ns
V
V
mA
mA
mW
°C
TIMING SPECIFICATIONS (AD976A: FS = 200 kHz; AD976: FS = 100 kHz; –40؇C to +85؇C, VDIG = VANA = +5 V unless otherwise noted)
Symbol
Min
Typ
Max
Units
Convert Pulsewidth
Data Valid Delay after R/C Low (AD976A/AD976)
BUSY Delay from R/C Low
BUSY Low (AD976A/AD976)
BUSY Delay after End of Conversion (AD976A/AD976)
Aperture Delay
Conversion Time (AD976A/AD976)
Acquisition Time
Bus Relinquish Time
BUSY Delay after Data Valid (AD976A/AD976)
Previous Data Valid after R/C Low (AD976A/AD976)
Throughput Time (AD976A/AD976)
R/C to CS Setup Time
Time Between Conversions (AD976A/AD976)
Bus Access and Byte Delay
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t7 + t8
t12
t13
t14
50
1.0/2.0
10
50
10
5/10
10
180/360
40
3.8/7.6
35
180/360
3.7/7.4
4.0/8.0
83
4.0/8.0
4.0/8.0
83
5/10
83
ns
µs
ns
µs
ns
ns
µs
µs
ns
ns
µs
µs
ns
µs
ns
Specifications subject to change without notice.
–4– REV. C

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ABSOLUTE MAXIMUM RATINGS1
Analog Inputs
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
CAP . . . . . . . . . . . . . . . . +VANA + 0.3 V to AGND2 – 0.3 V
REF . . . . . . . . . . . . . . . . . . . . . Indefinite Short to AGND2
Ground Voltage Differences
DGND, AGND1, AGND2 . . . . . . . . . . . . . . . . . . . . ± 0.3 V
Supply Voltages
VANA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VDIG to VANA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 7 V
VDIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Digital Inputs . . . . . . . . . . . . . . . . . . . –0.3 V to VDIG + 0.3 V
Internal Power Dissipation2
PDIP (N), SOIC (R), SSOP (RS) . . . . . . . . . . . . . 700 mW
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature Range (N, R, RS) . . . –65°C to +150°C
Lead Temperature Range
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
28-Lead PDIP: θJA = 74°C/W; θJC = 24°C/W,
28-Lead SOIC: θJA = 72°C/W; θJC = 23°C/W,
28-Lead SSOP: θJA = 109°C/W; θJC = 39°C/W.
AD976/AD976A
PIN CONFIGURATION
DIP, SOIC and SSOP Packages
VIN 1
AGND1 2
REF 3
28 VDIG
27 VANA
26 BUSY
CAP 4
25 CS
AGND2 5
D15 (MSB) 6
AD976
AD976A
24 R/C
TOP VIEW 23 BYTE
D14 7 (Not to Scale) 22 D0 (LSB)
D13 8
21 D1
D12 9
20 D2
D11 10
19 D3
D10 11
18 D4
D9 12
17 D5
D8 13
16 D6
DGND 14
15 D7
1.6mA IOL
TO
OUTPUT
PIN
CL
100pF
500A IOH
+2.1V
Figure 1. Load Circuit for Digital Interface Timing
Model
AD976AN
AD976BN
AD976CN
AD976AAN
AD976ABN
AD976ACN
AD976AR
AD976BR
AD976CR
AD976AAR
AD976ABR
AD976ACR
AD976ARS
AD976BRS
AD976CRS
AD976AARS
AD976ABRS
AD976ACRS
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Max
INL
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
ORDERING GUIDE
Min
S/(N+D)
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
Throughput
Rate
100 kSPS
100 kSPS
100 kSPS
200 kSPS
200 kSPS
200 kSPS
100 kSPS
100 kSPS
100 kSPS
200 kSPS
200 kSPS
200 kSPS
100 kSPS
100 kSPS
100 kSPS
200 kSPS
200 kSPS
200 kSPS
Package
Descriptions
Package
Options
28-Lead, 300 mil Plastic DIP
28-Lead, 300 mil Plastic DIP
28-Lead, 300 mil Plastic DIP
28-Lead, 300 mil Plastic DIP
28-Lead, 300 mil Plastic DIP
28-Lead, 300 mil Plastic DIP
28-Lead Small Outline Package
28-Lead Small Outline Package
28-Lead Small Outline Package
28-Lead Small Outline Package
28-Lead Small Outline Package
28-Lead Small Outline Package
28-Lead Shrink Small Outline Package
28-Lead Shrink Small Outline Package
28-Lead Shrink Small Outline Package
28-Lead Shrink Small Outline Package
28-Lead Shrink Small Outline Package
28-Lead Shrink Small Outline Package
N-28B
N-28B
N-28B
N-28B
N-28B
N-28B
R-28
R-28
R-28
R-28
R-28
R-28
RS-28
RS-28
RS-28
RS-28
RS-28
RS-28
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD976/AD976A features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. C
–5–
WARNING!
ESD SENSITIVE DEVICE