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ANALOGDEVICES fAX-ON-DEHAND HOTLINE - Page 12
r. ANALOG
LIllI DEVICES
.'
HighSpeed,
FastSettlingIe UpAmp
. AD509 I
FEATURES
Fat Settting Time
~O.1'" in 5OOns mex
PIN CONFIGURATION
TO-99
0.01% in 2.5ps max
High Slew Rate: 100V/1lS min'
Low 10': 25nA max
FREQUENCY
COMPENSATION
Guaranteed VOl Drift: 3OIlVrC mex
High CMRR: BOdB min
Orive.5OOpF
Low Price
APPLICATIONS
01A and AID Converlion
Wideband Amplifi8n
MultiplexeR
Pul. AmplifieR
OB ~ TPRODUCT DESCRIPTION
The ADS09j, ADS09K and ADS09S are monolithic
Soperational amplifiers specifically designed for applications
requiring fast settling times to high accuracy. Other compar-
Oable dynamic parameters include a small signal bandwidth of
L2OMHz, slew rate of lOOV/JlS min and a full power response
of 150kHz min. The devices are internally compensated for
Eall closed loop gains greater than 3, and are compensated with
a single capacitor for lower gains.
TEThe input characteristics of the AD.509 are consistent with
rINVERINTPINUGT 2
v-
2.. !.
V+
TOPVIEW
PRODUCT HIGHLIGHTS
1. The ADS09 is internally compensated for all closed loop
gains above 3. and compensated with a single capacitor for
lower gains thus eliminating the c:laborate stabilizing tech-
niques required by other high speed IC op amps.
2. The ADSO9 will drive capaciti~ loads of SOOpF without
0.01 % accuracy over limited temperature ranges; offset current
deterioration in settling time. Larger capacitive loads
is 2SnA max, offset voltage is 8mV max, nullable to' zero, and
offset voltage drift is limited to 30p.V/'C max. PSRR and
CMRR are typically 90dB.
can be driven by tailoring the compensation to minimize
settling time.
3. Common Mode Rejection, Gain and Noise are compatible
The ADS09 is designed for use with high speed D/A or AID
conveners where the minimum conversion time is limited by
the amplifier setding time. If 0.01 % accuracy of conversion
is required. a conversion cannot be made in a shoner period
with a 0.01 % accuracy device.
4. The ADSO9K and ADSO9S are 100% tested for minimum
slew rate and guaranteed to settle to 0.01% of its final
value in less than 2.Slls.
than the time required for the amplifier to settle to within
0.01 % of its final value,
All devices are supplied in the TO-99 package. The ADS09j
and ADS09K are specified for 0 to +70oC temperatUte range;
the ADS09S for operation from -SSoC to +12SoC.
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-ANALOGDEVICES fAX-ON-DEMAND HOTLINE
Page 13
AD509-SPECIFICATIONS(@ %25°&andVs= %15Vdeunlessoth8lWi~e specified)
,.
Model
AD5O9J
MiD Typ
Mas
AD5O9K
MiD Typ
Max
AD509S
MiD Typ
Max Uaita
OPEN LOOP GAIN
Vo = :t10V,RL2:2kO
TmiDtoT...,RL '" 2kO
OUTPUT CHARACTERISTICS
Voltage@RL = 2k.O,T....D[oT-
7,500
5,000
15,000
:10 :t 12
10,000 15,000
7,500
:10 :!:12
10,000
7,500
.
15.000
:tICI :!:12
VN
VN
V
FREQUENCY RESPONSE
Unity <din Small Sipal
Full Power Response
SlewRate, Unity Gain
SettlingTime
100.1%
100.01%
20
1.2 J.6
80' 120
200
1.0
20
l.5 2,0
80 120
200
1.0
20
1.5 2.0
100 120
200
1.0
MHz
MHz
VI.,...
500 ms
2.5 ,,"5
INPUT OFFSET VOLTAGE
Initial Offset
Input Offset Voltage T miDto T...
Input Off8CIVoltageVI.Supply,
T.....toT...
INPUT BIASCURRENT
l'Di0ai
T...toT-
OINPUT OFFSET CURRENT
BInitial
T,,=minlOmax
SINPUT IMPEDANCE
Differential
OINPUT VOLTAGE RANGE
LDifferential
Commoo Mode
ECommonMode Rejection
TINPUT NOISE VOLTAGE
Ef =10Hz
5 10
14
2OCt
125 250
SOO
20 50
100
4() 100
: 15
: 10
74 90
100
48
11
100
100 200
400
10 25
50
50 100
: 15
,dO
at 90
100
4 8 mV
11 mV
100 ILVN
100 200 nA
400 nA
10 25 nA
50 nA
50 100
MO
:!::i5
: 10
80 90
V
V
dB
100 nV/Y'Hz
f'" 100Hz
30 30 30 nV/Y'Hz
f=]OOIt}h
19 19
]9 nVIY'Hz
POWER SUPPLY
Rated Perfonnana:
Opcnting
QuicsceD[Current
TEMPERATURE RANGE
Opcnting. Rated Performanc:e
SIOtllF
:!:]5
:5
4
:20
'
0 +70
-65 +150
::!1: 5
::5 :!:20
46
0 +70
-65 + 150
:t 15 V
:!:5 :!:20 V
4 6 mA
-55 + 125 .C
-65 + 150 .C
NOTES
SpecifICationS subject to cbanae without DOrice,
AU miA and mu specuJCations are guarm>teed,
SpecifJCaDoaSshown ill boldface are tared on all 'prodUCtion units at fmal
dectric:aI tat. Results from t~ tests are used to calculate outgoing quality
Ie¥$.
ORDERING GUIDE
Model
AD509JH ,
AD509KH
AD509SH
Temperature Range
DoCto +70°C
DoCto + 70°C
-55"C to +12S"C
Package Option*
H-o8A
H-o8A
H-o8A
"H-O8A = TO-99 Style Metal Can. For outline information see Package
Information section.
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-ANALOGDEVICES fAX-ON-DEMAND HOTLINE
Page 1~
"
Applyintghe AD509
APPLYING THE ADS09
-display. The resultant waveform of (Eo EIN) of a typical
MEASURING SETTLING TIME. Settling time is defined as
that period required for an amplifier output to swing from
0 volts to full scale, usually 10 voltS, and to settle to within
a specified percentage of tbe final output voltage. For high
ADS09 is shown in Figure 3. Note that the waveform crosses
the 1mV point representing 0.01 % ac~uracy in approximately
l.S/JS. The top trace represents the output signal; the bottom
trace represents the error signal.
accuracy systems, the accuracy requirement is normally
specified as either 0.1'.16(lo-bit accuracy) or 0.01'.16(12-bit
accuracy) of the 10 volt output level. The settling time
perioo is comprised of an initial propagation delay, an
additional time for the amplifier to slew to the vicinity of
OUTPUT I
II
i
.0
.
10 volts, and a final time period to'recover from internal
saturation and other effects, and settle within the specified
ERROR
SIGNAL
--
,..
t ....1--r-
11m'
error band. Because settling time depends on both .linear
T n.
and nonlinear factors, there is no simple approach to
predicting itS final value to different levels of accuracy, ]n
particular, extremely high slew rates do not assure a rapid
scnling time, since this is only one of many factors affecting
settling time. In most high speed. amplifiers, after the
amplifier has slewed to the vicinity of tbe final output
voltage, it must recover from internal saturation and then
allow any overshoot and ringing to damp out. These
Odefinitions are illustrated in Figure 1.
BSOLETEE::~~{rE!~o ~-~A!E~~~:~=:===~--,--
Figure 3. Settling Time of AD509
SETTLING TIME VS. Rf AND Ri. Settling time of an
amplifier is a function of the feedback and input resistors,
since they interact with the input capacitance of the amplifier.
When operating in the non-inverting mode, the source
impedance should be kept relatively low; e.g., Sill; in order
to insure optimum performance. The small feedback
capacitor (SpF) is used in the settling time test circuit in
parallel with tbe feedback resistor to reduce ringing. This
capacitor partially cancels the pole formed in the loop gain
response as a result of the feedback and input resistors, and
the input capacitance.
SETTLING TIME VS. CAPACIT]VE LOAD. The ADS09
will drive capacitive loads of SOOpF without appreciable
deterioration in settling time. Larger capacitive loads can be
dtiven by tailoring the compensation to minimize settling
j IDEAO
~
TIME SLEWING IRECOIIERYLINEAR SETTLING
time, Figure 4 shows the settling time of a typical ADS09,
compensated for unity gain witb a 1SpF capacitOr, with a
SOOpF capacitive load on the output. Note that settling time
-SETTLING TIME To1:..:lE-1
to 0.01 % is still under 2.01-15.
~:OR .:!: x100%
Figure 1. Settling Time
The AD509K and AD509S are guaranteed to settle to 0.1%
in SOOnsand 0.01" in 2.S/JS when tested as shown in Figure 2.
There is no appreciable degradation in settling time when
the capacitive load is increa.scd to 500pF, as discussed below.
The settling time is computed by summing the output and the
input into a differential amplifier, which then drives a scope
OIJTP\IT I
1/
ERROR
SIGNAL
,
I
i,-
no-
-m
t i- f1$
Figure 4. AD509 with 500pF Capacitive Load
fin
5f>f
DECOUI'lING CAPACITORS
OMITTED fOR CLARITY
SCOI'£
Figure 2. AD509 Settling Time Test Circuit
SUGGESTIONS FOR MINIMIZING SETTL]NG TIME. The
ADS09 has been designed to settle to 0.01 % accuracy in
1 to 2.S/JS. However, this amplifier is only a building block
in a circuit that also has a feedback network, input and output
connections, power supply connections, and a number of
external componentS. What has been painsta.kingly gained in
amplifier design can be lost without careful circuit design,
Some of the elements of a good high speed design are..........
CONNECTIONS. It is essential that care be taken in the.
signal and power ground circuits to avoid inducing or
generating extraneous voltages in the ground signal paths.
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-ANALOGDEVICES fAX-ON-DEMAND HOTLINE
Page 15
AD509
"
The O.lIlF cetatnic power supply bypass capacitors are
considerably more important for the AD509 than for low
frequency general purpose amplifiers. Their main purpose
is to convert the distributed high frequency ground to a
'lumped singJe point (the V+ point). The V+ to V- O.lIlF
capacitor equalizes the supply grounds while the O.lIlF
capacitor from V+ to signal ground should be returned to
signal common. The signal common, which is bypassed to
pin 7, is defined as that point at which the input signal
source, tltc feedback network, and tbe retUrn side of the load
are joined to the power common,
Note that the diagram shows each individual capacitor
directly connected to the appropriate terminal (pin 7 [V+).
[n addition, it is suggested that all connections be sbort and
direct, and as physically dose to the case as possible, so that
the length of any conducting path shared by external
components will be minimized.
.
COMPONENTS. Resistors are preferably metal fIlm types.
because they have less capacitance and stray inductance
than wire wound types, and are available with excellent
accuracies and temperatUre coefficients.
Diodes are hot carrier types for the very fastest-settling
applications, but lN914 types are suitable for more
routine uses.
Capacitors in critical locations are polystyrene, teflon, or
polycarbonate to minimize dielectric absorption.
CIRCUIT. For the fastest settling times, keep leads short,
INVERTING
INPUT
_INVERTING
INPUT
TO SIGNAL
COMMON POINT
OUTPUT
O O.,..F
CEIlAMIe OISe
BFigunt 5. Configuration for Unity Gain Applications
SODYNAMIC RESPONSE OF ADS09
120
L,100
..! E8'
Tz'"
1800
~:i... <10
E~ 20
30'
orient components to minimize stray capacitance, keep
circuit impedance levels as low as consistent with the out-
put capabilities of the amplifier and the signal source,
reduce all extemalload capacitances to the absolute
minimum. Don't overlook sockets or printed circuit
board mounting as possible sources of dielectric absorption.
Avoid pole-zero mismatches in any feedback networks used
with the amplifier. Minimize noise pickup,
II
-20
.0
100 ..
1011 1OOOt 1M
10M 100M
FREQUENCY-II,
-20.0
100
-..
101< IOOIt 1M
10M 100M
FREQUENCY H.
Figure 6. Open Loop Frequency and Phase Response
Figure7. Open Loop Frequency Response for VariousCc's
THE ADS09 AS AN OUTPUT AMPLIFIER FOR FAST
CURRENT -OUTPUT D-TO-A CONVERTERS
Most fast integrated circuit digital to analog converters have
current outputs. That is, the digital input code is translated
to an output current proportional to the digital code. In
many applications, that output current is converted to a volt-
age by connecting an operational amplifier in the current-to-
voltage convc:;rsionmode. '
, The senling time of the combination depends on the settling
time of the DAC and the output amplifier. A good approxima-
tion is:
=Is TOTAL .JCt~DAC) 2 + ( ts AMP) 2
Figure 8 shows the AD509K connected as an output amplifier
with the ADS65K, high speed 12-bit IC digital-to-analog con-
verter. The 10 picofarad capacitor, Cl, compensates for the
2SpF AD56S output capacitance. The voltage output of the
AD565K/ADS09K combination settles to :to.Ol% in one
microsecond. The low input voltage drift and high open loop
gain of the ADSO9K assures 12-bit accuracy over the operating
temperature range.
AD566K
SkU ~
Some IC DACs settle to final output value in 100-500 nano-
seconds. Since most IC op amps require a longer time to settle
to :1:0.1%or :1:0.01%of final value, amplifier settling time can
dominate total settling time. And for a 12-bit DAC, one least
significant bit is only 0,024% of full-scale, so low drift and
high linearity and precision are also required of tbe output
amplifier.
Figure8. AD509 as an Output Amplifier for B Fast Current-
Output D-tO-AConvert",
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