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a
PPMU Circuit
AD53508
FEATURES
Dual Measurement Channels
Precision Four-Quadrant-Per-Pin V/I Source
Programmable Current Force Ranges
؎204.8 A and ؎2.048 mA
Five Current Measurement Ranges
204.8 nA to ؎2.048 mA
Output Voltage Range: –4 V to +9 V
Power Supplies: +15 V, +5 V, and –10 V
44-Lead Plastic J-Leaded Chip Carrier Package
APPLICATIONS
Can Be Used with the AD53032 DCL to Extend Current
Force Range to 35 mA
GENERAL DESCRIPTION
The AD53508 is a custom dual-channel parametric measure-
ment circuit for use in semiconductor automatic test equipment.
It contains programmable modes to force a pin voltage and
measure its current or to integrate and hold a current value.
Alternatively, a current can be forced and the compliance volt-
age measured.
The device provides a remote force/sense capability to ensure
accuracy at the tester pin. A guard output is available to drive
the shield of a force/sense pair.
Two input references per channel permit controlled switching to
different voltage or current levels. The forced voltage or current
levels can be switched back to the measurement system to read
back the analog levels for system calibration.
The circuit is powered by +15 V, +5 V, and –10 V supplies and
dissipates 230 mW nominally.
Recommended Use of the PPMU with AD53032 DCL
The PPMU can be used with the AD53032 DCL to extend the
Current Force Range beyond 2 mA VCOM can be set to the
maximum spec allowance of 8 V, which would allow the maxi-
mum Current Force of IOL of 35 mA. The combination of the
PPMU and the DCL would have a few benefits including:
1. Accurately measuring low currents.
2. Can take parallel measurements by using one PMU per pin.
FUNCTIONAL BLOCK DIAGRAM
DAC1
DAC2
DSR
MEAS OUT
AD53508
SENSE
S8
S9
S6
EXT RC
40pF
S7
ENABLE
+2.5V
OUTPUT
S1
S2
S3
VF
IF
VM
IM
MAIN
S4
S5
1.25R
DIFF
R
C1
S10
INTEGRATE R1
1kR2
2mA
10k
200A UNITY
INT/IM
S11
S12
S13
S14
S15
S16
CON
1.25R
R
GUARD
S18
SENSE
FORCE
S17
GUARD
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001

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Last Content Update: 11/01/2016
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Documentation
Data Sheet
• AD53508: PPMU Circuit Data Sheet
Design Resources
• AD53508 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
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AD53508–SPECIFICATIONS (TA = 25؇C, rated power supplies unless otherwise noted.)
Parameter
Condition
Min Typ Max
VOLTAGE FORCE/MEASURE MODE
Voltage Swing, ± 2 mA Range
± 2 mA Drive
± 100 µA Drive
4 +9
5 +12
ACCURACY
Gain (± 0.1% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Current Measure CMRR (at MEAS_OUT)
DRIFT
Gain Error Temperature Coefcient
0.999
1.001
± 15
± 0.02
± 0.31
± 20
Offset Drift
CURRENT FORCE/MEASURE MODE RANGES
0 (High)
1 (Low)
ACCURACYHIGH RANGE
Transconductance (± 3% Tolerance)
Transresistance (± 3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced
Transconductance/Error
DRIFTHIGH RANGE
Gain Error Temperature Coefcient
Force Mode
Measure Mode
Force Mode
± 100
± 2.0
± 200
0.776 0.8
1.21 1.25
0.2
0.824
1.29
± 40
± 0.05
+0.4
+10/60
Offset Drift
ACCURACYLOW RANGE
Transconductance (± 3% Tolerance)
Transresistance (± 3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced
Transconductance/Error
DRIFTLOW RANGE
Gain Error Temperature Coefcient
Force Mode
Measure Mode
Force Mode
± 400
77.6 80
12.1 12.5
0.02
82.4
12.9
±4
± 0.05
+0.04
+10/60
Offset Drift
CURRENT MEASURE INTEGRATE MODE RANGES
High
Medium
Low
ACCURACYHIGH RANGE
Transresistance Error (± 3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced Transresistance Error
DRIFTHIGH RANGE
Gain Error Temperature Coefcient
Offset Drift
ACCURACYMEDIUM RANGE
Transresistance Error (± 3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced Transresistance Error
DRIFTMEDIUM RANGE
Gain Error Temperature Coefcient
Offset Drift
± 40
± 20.0
± 2.0
± 200
0.121
0.125
0.129
± 400
± 0.05
± 2.5
± 20
±2
1.21 1.25 1.29
± 40
± 0.05
± 0.25
± 20
± 250
Unit1
V
V
V/V
mV
% of Span
mV/V
ppm (PV
or MV)/°C
µV/°C
mA
µA
mA/V
V/mA
µA
% of Span
µA/V
ppm (PV
or MV)/°C
nA/°C
µA/V
V/mA
µA
% of Span
µA/V
ppm (PV
or MV)/°C
nA/°C
µA
µA
nA
V/µA
nA
% of Span
nA/V of Output
ppm MV/°C
nA/°C
V/µA
nA
% of Span
nA/V of Output
ppm MV/°C
pA/°C
–2– REV. A

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Parameter
ACCURACYLOW RANGE
Transresistance Error (± 3% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Output Compliance Voltage-Induced Transresistance Error
DRIFTLOW RANGE
Gain Error Temperature Coefcient
Offset Drift
DISABLE MODE2
Voltage Swing, ± 2 mA Range
± 2 mA Drive
± 100 µA Drive
ACCURACY
Gain (± 0.1% Tolerance)
Offset Error
Gain Nonlinearity (Relative to Endpoints)
Current Measure CMRR (at MEAS_OUT)
DRIFT
Gain Error Temperature Coefcient
Condition
Min Typ Max
0.0121
0.0125
0.0129
±4
± 0.05
± 0.025
± 20
± 70
4
5
0.999
+9
+12
1.001
± 15
± 0.02
± 0.31
± 20
Offset Drift
OTHER SPECIFICATIONS
Power Supply Rejection Ratio
CURRENT MEASURE HOLD MODE LEAKAGE
CROSSTALK3
f < 40 Hz, VCC
f < 40 Hz, VEE
f = 40 kHz, VCC
f = 40 kHz, VEE
TAMB = 70°C
70
60
35
25
SETTLING TIMES TO 0.01%
Voltage Force and Guard Voltage
Current Force (200 µA Range)
MEAS_OUT Pin
SHORT CIRCUIT CURRENT LIMIT MAGNITUDE
CLOAD = 100 pF
CLOAD = 2000 pF
ZLOAD = 100 pFʈ50 k
CLOAD = 20 pF
Any Output Except Guards
8.5
GUARD SCC LIMIT MAGNITUDE
2.5
GUARD OFFSET (FROM SENSE INPUT PIN)
65
IB (DAC1, DAC2) CURRENT
DIGITAL INPUTS
VIH
VIL
IIN (Input leakage current)
POWER SUPPLIES
VCC (Positive Analog Supply Voltage)
VEE (Negative Analog Supply Voltage)
VDD (Logic Supply Voltage)
ICC (Positive Analog Supply Current)
IEE (Negative Analog Supply Current)
IDD (Logic Supply Current Is 0 with Inputs at Rails,
Worst Case @ 2.4 VIN)
NOTES
1PV = Programmed Value, MV = Measured Value, FSR = Full-Scale Range = span.
2Output connected: DAC2 and 2 mA range selected, unconditionally.
3f < 40 Hz, both channels in current force mode; other channel output voltage swinging rail to rail.
Specications subject to change without notice.
2.4
14.0
10.5
4.75
5
15
25
15.0
10.0
5.0
± 100
± 1.2
± 0.02
20
2
50
2
20
10
0
± 1.0
0.8
10
15.75
9.0
5.25
15
5
8
AD53508
Unit1
V/nA
nA
% of Span
nA/V of Output
ppm MV/°C
pA/°C
V
V
V/V
mV
% of Span
mV/V
ppm (PV or
MV)/°C
µV/°C
dB
dB
dB
dB
nA
% of Span
µs
ms
µs
µs
mA
mA
mV
µA
V
V
µA
V
V
V
mA
mA
mA
REV. A
–3–

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AD53508
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
Min Max
Unit Condition
VDD to VEE
0.3 +26.4 V
VCC to VEE
0.3 +26.4 V
VDD to DGND
0.3 +6
V
Digital Inputs to DGND 0.3 VCC+0.3 V
Power Dissipation
700 mW
Operating Temperature
Range
25 70
°C
Storage Temperature 60
+125 °C
Lead Temperature
300 °C
Force/Sense Outputs VEE0.8 VCC+0.8 V
TA 75°C
Soldering (10 sec)
Or 75 mA,
Whichever Is Less
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only; functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specication is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
AD53508JP
Temperature
Range
25°C to 70°C
Package
Description
Plastic Leaded
Chip Carrier
Package
Option
P-44A
PIN CONFIGURATION
R2 A 7
SENSE A 8
FORCE A 9
GUARD A 10
MEAS OUT A 11
VCC 12
M CON A* 13
VEE 14
FORCE I A* 15
FORCE EN A* 16
DAC1 SEL A* 17
6 5 4 3 2 1 44 43 42 41 40
PIN 1
IDENTIFIER
AD53508
TOP VIEW
(Not to Scale)
39 R2 B
38 SENSE B
37 FORCE B
36 GUARD B
35 MEAS OUT B
34 VDD
33 M CON B*
32 DIGGND
31 FORCE I B*
30 FORCE EN B*
29 DAC1 SEL B*
18 19 20 21 22 23 24 25 26 27 28
* = ACTIVE LO
PIN FUNCTION DESCRIPTIONS
Pin Name
Description
1 DSR_2.5
2 DAC2_A
3 DAC1_A
4 EXT_RC_A
5 C1_A
6 R1_A
7 R2_A
8 SENSE_A
9 FORCE_A
10 GUARD_A
11 MEAS_OUT_A
12 VCC
13 M_CON_A*
14 VEE
15 FORCE_I_A*
16 FORCE_EN_A*
17 DAC1_SEL_A*
18 INTEG_A*
19 HOLD_A*
20 I_RANGE0_A*
21 I_RANGE1_A*
22 VERIFY*
23 OUTPUT_CON_A*
24 OUTPUT_CON_B*
25 I_RANGE1_B*
26 I_RANGE0_B*
27 HOLD_B*
28 INTEG_B*
29 DAC1_SEL_B*
30 FORCE_EN_B*
31 FORCE_I_B*
32 DIGGND
33 M_CON_B*
34 VDD
35 MEAS_OUT_B
36 GUARD_B
37 FORCE_B
38 SENSE_B
39 R2_B
40 R1_B
41 C1_B
42 EXT_RC_B
43 DAC1_B
44 DAC2_B
* = Active Lo
2.5 V Reference Input
First of Two Switchable Inputs
Second of Two Switchable Inputs
External RS and C Common
External Capacitor
External Resistor
External Resistor
Sense Input
Force Output
Guard Drive Output
Measurement Output
+15 V Analog Supply
Connect Measure Output to Bus
10 V Analog Supply
Force V (When Hi) or I (When Lo)
Control Input
Select DAC1 (When Lo) or DAC2
Control Input
Control Input
Select 2 mA Range (Active Lo)
Select 200 µA Range (Active Lo)
Measure Forced Voltage or Current
Connect Pin Drive (Active Lo)
Connect Pin Drive (Active Lo)
Select 200 µA Range (Active Lo)
Select 2 mA Range (Active Lo)
Control Input
Control Input
Select DAC1 (When Lo) or DAC2
Control Input
Force V (When Hi) or I (When Lo)
Digital Ground
Connect Measure Output to Bus
+5 V Digital Supply
Measurement Output
Guard Drive Output
Force Output
Sense Input
External Resistor
External Resistor
External Capacitor
External RS and C Common
Second of Two Switchable Inputs
First of Two Switchable Inputs
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD53508 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– REV. A