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June 1989
9602 DM9602 Dual Retriggerable
Resettable One Shots
General Description
These dual resettable retriggerable one shots have two in-
puts per function one which is active high and one which is
active low This allows the designer to employ either lead-
ing-edge or trailing-edge triggering which is independent of
input transition times When input conditions for triggering
are met a new cycle starts and the external capacitor is
allowed to rapidly discharge and then charge again The
retriggerable feature permits output pulse widths to be ex-
tended In fact a continuous true output can be maintained
by having an input cycle time which is shorter than the out-
put cycle time The output pulse may then be terminated at
any time by applying a low logic level to the RESET pin
Retriggering may be inhibited by either connecting the Q
output to an active high input or the Q output to an active
low input
Features
Y 70 ns to % output width range
Y Resettable and retriggerable 0% to 100% duty cycle
Y TTL input gating leading or trailing edge triggering
Y Complementary TTL outputs
Y Optional retrigger lock-out capability
Y Pulse width compensated for VCC and temperature
variations
Y Alternate Military Aerospace device (54xxx) is available
Contact a National Semiconductor Sales Office Distrib-
utor for specifications
Connection Diagram
Dual-In-Line Package
Order Number 9602DMQB 9602FMQB or DM9602N
See NS Package Number J16A N16E or W16A
Function Table
Pin No’s
AB
HxL
H
X
L
LxH
X
H e High Voltage Level
L e Low Voltage Level
X e Don’t Care
CLR
H
H
L
Operation
Trigger
Trigger
Reset
C1995 National Semiconductor Corporation TL F 6611
TL F 6611 – 1
RRD-B30M105 Printed in U S A

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Absolute Maximum Ratings (Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
5 5V
Operating Free Air Temperature Range
Military
b55 C to a125 C
Commercial
0 C to a70 C
Storage Temperature Range
b65 C to a150 C
Note The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
VCC
VIH
VIL
IOH
IOL
TA
Parameter
Supply Voltage
High Level Input
Voltage
TA e b55 C
TA e 0 C
TA e 25 C
TA e 75 C
TA e 125 C
Low Level Input
Voltage
TA e b55 C
TA e 0 C
TA e 25 C
TA e 75 C
TA e 125 C
High Level Output Current
Low Level Output Current
Free Air Operating Temperature
Military
Min Nom
45 5
2
17
15
b55
Max
55
0 85
09
0 85
b0 8
16
125
Min
4 75
Commercial
Nom
Max
5 5 25
19
18
1 65
0 85
0 85
0 85
b0 8
16
0 75
Units
V
V
V
mA
mA
C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
VI
VOH
Parameter
Input Clamp Voltage
High Level Output
Voltage
VOL Low Level Output
Voltage
Conditions (Note 3)
VCC e Min II e b12 mA
VCC e Min IOH e Max
VIL e Max VIH e Min
(Note 4)
VCC e Min IOL e Max
VIL e Max VIH e Min
(Note 4)
MIL
COM
Min
Typ
(Note 1)
Max
b1 5
Units
V
24 V
04
V
0 45
IIH High Level Input Current VCC e Max VI e 4 5V
IIL Low Level Input
Current
VCC e Max
MIL VI e 0 40V
COM VI e 0 45V
VCC e Min
MIL VI e 0 40V
COM VI e 0 45V
IOS Short Circuit
Output Current
VCC e Max VOUT e 1V
(Notes 2 and 4)
MIL
COM
60
b1 6
b1 6
b1 24
b1 41
b25
b35
mA
mA
mA
ICC Supply Current
VCC e Max
MIL
COM
39 45
mA
39 50
Note 1 All typicals are at VCC e 5V TA e 25 C
Note 2 Not more than one output should be shorted at a time
Note 3 Unless otherwise noted RX e 10k for all tests
Note 4 Ground PIN 1(15) for VOL on PIN 7(9) or VOH and IOS on PIN 6(10) and apply momentary ground to PIN 4(12) Open PIN 1(15) for VOL on PIN 6(10) or VOH
and IOS on PIN 7(9)
2

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Switching Characteristics VCC e 5V TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
Conditions
Military
Min Max
Commercial
Min Max
Units
tPLH Propagation Delay Time Negative Trigger Input
Low-to-High Level Output to True Output
35 40 ns
tPHL
Propagation Delay Time
High-to-Low Level Output
tPW(MIN) Minimum True Output
Pulse Width
Minimum Complement
Pulse Width
Negative Trigger Input
To Complement Output
CL e 15 pF
CX e 0
RX e 5 kX
43 48 ns
90 100
ns
100 110
tPW Pulse Width
CSTRAY Maximum Allowable Wiring
Capacitance
RX e 10 kX
CX e 1000 pF
3 08
3 76
3 08
3 76
Pins 2 14 to
GND
50
50
ms
pF
RX External Timing Resistor
5 25 5 50 kX
Logic Diagrams
TL F 6611 – 2
Operating Rules
1 An external resistor (RX) and external capacitor (CX) are
required as shown in the Logic Diagram
2 The value of CX may vary from 0 to any necessary value
available If however the capacitor has leakages ap-
proaching 3 0 mA or if stray capacitance from either ter-
minal to ground is more than 50 pF the timing equations
may not represent the pulse width obtained
3 The output pulse with (t) is defined as follows
(1
t e K RXCX
1a
RX
for CX l 103 pF
K 0 34
where
RX is in kX CX is in pF
t is in ns
for CX k 103 pF see Figure 1
for K vs CX see Figure 6
TL F 6611 – 3
4 If electrolytic type capacitors are to be used the following
three configurations are recommended
A Use with low leakage capacitors
The normal RC configuration can be used predictably
only if the forward capacitor leakage at 5 0V is less
than 3 mA and the inverse capacitor leakage at 1 0V is
less than 5 mA over the operational temperature
range
R k 0 6 RX (Max)
TL F 6611 – 4
3

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Operating Rules (Continued)
B Use with high inverse leakage current electrolytic ca-
pacitors
The diode in this configuration prevents high inverse
leakage currents through the capacitor by preventing
an inverse voltage across the capacitor The use of
this configuration is not recommended with retriggera-
ble operation
t 0 3 RCX
TL F 6611–5
C Use to obtain extended pulse widths
This configuration can be used to obtain extended
pulse widths because of the larger timing resistor al-
lowed by beta multiplication Electrolytics with high in-
verse leakage currents can be used
R k RX (0 7) (hFE Q1) or k 2 5 MX whichever is the
lesser
RX (min) k RY k RX (max)
(5 kX s RY s 10 kX is recommended)
Q1 NPN silicon transistor with hFE requirements of
above equations such as 2N5961 or 2N5962
t 0 3 RCX
7 Input Trigger Pulse Rules (See Triggering Truth Table)
TL F 6611 – 8
Input to Pin 5(11)
(Pin 3(13) e HIGH)
Pin 4(12) e LOW
t1 t3 e Min Positive Input Pulse Width l 40 ns
t2 t4 e Min Negative Input Pulse Width l 40 ns
TL F 6611 – 9
Input to Pin 4(12)
(Pin 3(13) e HIGH)
Pin 5(11) e HIGH
8 The retriggerable pulse width is calculated as shown be-
low
 J1
tW e t a tPLH e K RX CX
1a
RX
a tPLH
TL F 6611–6
This configuration is not recommended with retriggera-
ble operation
5 To obtain variable pulse width by remote trimming the
following circuit is recommended
TL F 6611 – 10
The retrigger pulse width is equal to the pulse width (t) plus a delay time For
pulse widths greater than 500 ns tW can be approximated as t Retriggering will
not occur if the retrigger pulse comes within 0 3 CX (ns) after the initial trigger
pulse (i e during the discharge cycle)
9 Reset Operation An overriding clear (active LOW level)
is provided on each one shot By applying a LOW to the
reset any timing cycle can be terminated or any new cy-
cle inhibited until the LOW reset input is removed Trigger
inputs will not produce spikes in the output when the re-
set is held LOW
TL F 6611–7
6 Under any operating condition CX and RX (min) must be
kept as close to the circuit as possible to minimize stray
capacitance and reduce noise pickup
TL F 6611 – 11
10 VCC and Ground wiring should conform to good high
frequency standards so that switching transients on VCC
and Ground leads do not cause interaction between one
shots Use of a 0 01 to 0 1 mF bypass capacitor be-
tween VCC and Ground located near the DM9602 is rec-
ommended
For further detailed device characteristics and output performance please
refer to the NSC one-shot application note AN-366
4

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Typical Performance Characteristics
TL F 6611 – 12
FIGURE 1 Output Pulse Width vs Timing Resistance
and Capacitance for CX k 103 pF
TL F 6611 – 13
FIGURE 2 Normalized Output Pulse Width
vs Ambient Temperature
TL F 6611 – 14
FIGURE 3 Pulse Width vs Timing Resistor
TL F 6611 – 15
FIGURE 4 Normalized Output Pulse Width
vs Supply Voltage
TL F 6611 – 16
FIGURE 5 Minimum Output Pulse Width
vs Ambient Temperature
TL F 6611 – 17
FIGURE 6 Typical ‘‘K’’ Coefficient Variation
vs Timing Capacitance
5