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CS4952/53
NTSC/PAL Digital Video Encoder
Features
l Simultaneous composite and S-video output
l Supports RS170A and CCIR601 composite
output timing
l Multi-standard support for NTSC-M, PAL (B, D,
G, H, I, M, N, Combination N)
l Optional progressive scan @ MPEG2 field rates
l CCIR656 input mode supporting EAV/SAV
codes and CCIR601 Master/Slave input modes
l Stable color subcarrier for MPEG2 systems
l NTSC closed caption encoder with interrupt
l Supports Macrovision copy protection in
CS4953 version
l Host interface configurable for parallel or I2C
compatible operation
l General purpose input and output pins
l Individual DAC power-down capability
l On-chip voltage reference generator
l On-chip color bar generator
l +5 volt only, CMOS, low power modes, tri-state
DACs
Description
The CS4952/3 provides full conversion from YCbCr or
YUV digital video formats into NTSC & PAL Composite
and Y/C (S-video) analog video. Input formats can be
27 MHz 8-bit YUV, 8-bit YCbCr, or CCIR656 with sup-
port for EAV/SAV codes. Output video can be formatted
to be compatible with NTSC-M, or PAL B,D,G,H,I,M,N,
and Combination N systems. Also supported is NTSC
line 21 and line 284 closed captioning encoding.
Four 9-bit DACs provide two channels for an S-Video out-
put port and two composite video outputs. 2x oversampling
reduces the output filter requirements and guarantees
no DAC related modulation components within the spec-
ified bandwidth of any of the supported video standards.
Parallel or high speed I2C compatible control interfaces
are provided for flexibility in system design. The parallel
interface doubles as a general purpose I/O port when the
CS4952/3 is in I2C mode to help conserve valuable
board area.
ORDERING INFORMATION
CS4952/3-CL 44 pin PLCC
CS4952/3-CQ 44 pin TQFP
CLK
SCL
SDA
PDAT[7:0]
RD*
WR*
8
I 2C
Interface
Host
Parallel
Interface
Control
Registers
ADDR
XTAL
Color Sub-carrier
Synthesizer
VAA
Output
Interpolate
LPF
Chroma Amplifier
Chroma Modulate
Σ
Burst Insert
Chroma Interpolate
9-Bit
DAC
9-Bit
DAC
9-Bit
DAC
9-Bit
DAC
C
CVBS37
CVBS75
Y
8
VD[7:0]
Video
Formatter
U, V
Y
LPF
Luma Delay
HSYNC*
VSYNC*
FIELD
INT
RESET*
Video Timing
Generator
Luma Amplifier
Sync Insert
Output
Interpolate
LPF
GND
Voltage
Reference
Current
Reference
TEST
VREFIN
VREFOUT
ISET
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
Copyright © Cirrus Logic, Inc. 1997
(All Rights Reserved)
OCT ‘97
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CS4952/53
TABLE OF CONTENTS
AC & DC PARAMETRIC SPECIFICATIONS .....................................................................4
INTRODUCTION ...............................................................................................................11
FUNCTIONAL DESCRIPTION .........................................................................................11
Video Timing Generator .........................................................................................11
Video Input Formatter .............................................................................................11
Color Subcarrier Synthesizer ..................................................................................12
Chroma Path ..........................................................................................................12
Luma Path ..............................................................................................................12
Digital to Analog Converters ...................................................................................13
Voltage Reference ..................................................................................................13
Current Reference ..................................................................................................13
Host Interface .........................................................................................................13
Closed Caption Services ........................................................................................13
Control Registers ....................................................................................................13
OPERATIONAL DESCRIPTION .......................................................................................14
Reset Hierarchy ......................................................................................................14
Video Timing ...........................................................................................................14
Slave Mode Input Interface .............................................................................14
Master Mode Input Interface ...........................................................................14
Vertical Timing .................................................................................................15
Horizontal Timing ............................................................................................15
NTSC Interlaced ..............................................................................................17
PAL Interlaced .................................................................................................17
Progressive Scan ............................................................................................19
PAL Progressive Scan ....................................................................................19
NTSC Progressive Scan .................................................................................19
CCIR-656 ................................................................................................................19
Digital Video Input Modes .......................................................................................22
Multi-standard Output Format Modes .....................................................................22
Subcarrier Generation ............................................................................................22
Subcarrier Compensation .......................................................................................22
Closed Caption Insertion ........................................................................................23
Color Bar Generator ...............................................................................................23
Interrupts ................................................................................................................24
General Purpose I/O Port .......................................................................................24
ANALOG ...........................................................................................................................24
Analog Timing .........................................................................................................24
VREF ......................................................................................................................25
ISET ........................................................................................................................25
DACs ......................................................................................................................25
Luminance DAC ..............................................................................................25
Chrominance DAC ..........................................................................................25
CVBS75 DAC ..................................................................................................26
CVBS37 DAC ..................................................................................................26
PROGRAMMING ..............................................................................................................27
Host Control Interface .............................................................................................27
I2C Interface ....................................................................................................27
8-bit Parallel Interface .....................................................................................27
Register Description ...............................................................................................28
Control Register 0 ............................................................................................28
Control Register 1 ............................................................................................29
Control Register 2 ............................................................................................30
DAC Power Down Register ..............................................................................30
Status Register.................................................................................................31
Background Color Register ..............................................................................31
GPIO Control Register .....................................................................................31
GPIO Data Register .........................................................................................32
Chroma Filter Register .....................................................................................32
Luma Filter Register .........................................................................................32
I2C Address Register .......................................................................................32
Subcarrier Amplitude Register .........................................................................33
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CS4952/53
Subcarrier Synthesis Register ......................................................................... 33
Hue LSB Adjust Register ................................................................................. 33
Hue MSB Adjust Register ................................................................................ 33
Closed Caption Enable Register...................................................................... 34
Closed Caption Data Register ......................................................................... 34
Interrupt Enable Register ................................................................................. 34
Interrupt Clear Register.................................................................................... 35
Device ID Register ........................................................................................... 35
BOARD DESIGN & LAYOUT CONSIDERATIONS ......................................................... 36
Power and Ground Planes ..................................................................................... 36
Power Supply Decoupling ...................................................................................... 36
VREF Decoupling ................................................................................................... 36
Digital Interconnect ................................................................................................ 36
Analog Interconnect ............................................................................................... 37
Analog Output Protection ....................................................................................... 37
ESD Protection ....................................................................................................... 37
External DAC Output Filter ..................................................................................... 37
DEVICE PINOUT - 44 PLCC ............................................................................................ 38
PLCC Pin Description ............................................................................................ 39
DEVICE PINOUT - 44 TQFP ............................................................................................ 41
TQFP Pin Description ............................................................................................ 42
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CS4952/53
AC & DC PARAMETRIC SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (AGND, DGND = 0 V, all voltages with respect to 0 V.)
Parameter
Power Supply
Input Current Per Pin
Except Supply Pins
Output Current Per Pin
Except Supply Pins
Analog Input Voltage
Digital Input Voltage
Ambient Temperature
Power Applied
Storage Temperature
Symbol
VAA
Min Max
-0.3 6.0
-10 10
-50 +50
-0.3 VAA+0.3
-0.3 VAA+0.3
-55 +125
-65 +150
Units
V
mA
mA
V
V
°C
°C
Warning: Operating beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS: (AGND, DGND = 0 V, all voltages with
respect to 0 V.)
Parameter
Power Supplies: Digital Analog
Operating Ambient Temperature
Symbol
VAA
TA
Min Typ Max
4.75 5.0 5.25
0 +25 +70
Units
V
°C
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CS4952/53
D.C. CHARACTERISTICS: (TA=25 C; VAA = 5 V; GND = 0 V.)
Parameter
Symbol
Digital Inputs
High Level Input Voltage
High Level Input Voltage
V [7:0], PDAT [7:0],
HSYNC/VSYNC/FIELD/CLKIN
I2C
VIH
VIH
Low Level Input Voltage
All Inputs VIL
Input Leakage Current
Digital Inputs -
Digital Outputs
High Level Output Voltage
Io = -4mA VOH
Low Level Output Voltage
Io = 4mA VOL
Low Level Output Voltage
SDA pin only, Io = 6mA VOL
Output Leakage Current
High-Z Digital Outputs -
Analog Outputs
Full Scale Output Current
CVBS37/Y/C (Note 1) IO37
Full Scale Output Current
CVBS75 (Note 1) IO75
LSB Current
CVBS37/Y/C (Note 1) IB37
LSB Current
CVBS75 (Note 1) IB35
DAC-to-DAC Matching
MAT
Output Compliance
VOC
Output Impedance
ROUT
Output Capacitance
COUT
DAC Output Delay
ODEL
DAC Rise/Fall Time
(Note 2) TRF
Voltage Reference
Reference Voltage Output
VOV
Reference Input Current
IVC
Power Supply
Supply Voltage
VAA
Supply Current
All DACs on
CVBS75/CVGS37 only
CVBS75 only
IAA1
IAA2
IAA3
Min
2.0
0.7VAA
-0.3
-10
2.4
-
-
-10
32.9
16.4
64.5
32.2
-
0
-
-
-
-
1.198
-
4.75
-
-
-
Typ Max Units
- VAA+0.3 V
- -V
- 0.8 V
- +10 µA
- VAA V
- 0.4 V
- 0.4 V
- +10 µA
34.7
17.3
68
34
2
-
15
-
4
2.5
36.5
18.2
71.5
35.8
-
+1.4
-
30
12
5
mA
mA
µA
µA
%
V
k
pF
ns
ns
1.232
-
1.272
10
V
µA
5 5.25 V
180 200 mA
110 - mA
75 - mA
Notes: 1. Output current levels with ISET = 10 k, VREFIN = 1.232 V.
2. Times for black-to-white level and white-to-black level transitions.
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