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a
FEATURES
Fast 16-Bit ADC
100 kSPS Throughput Rate—AD977
200 kSPS Throughput Rate—AD977A
Single 5 V Supply Operation
Power Dissipation 100 mW Max
Power-Down Mode 50 W
Input Ranges:
Unipolar; 0 V–10 V, 0 V–5 V and 0 V–4 V
Bipolar; ؎10 V, ؎5 V and ؎3.3 V
Choice of External or Internal 2.5 V Reference
High Speed Serial Interface
On-Chip Clock
20-Lead Skinny DIP or SOIC Package
28-Lead Skinny SSOP Package
16-Bit, 100 kSPS/200 kSPS
BiCMOS A/D Converter
AD977/AD977A
FUNCTIONAL BLOCK DIAGRAM
REF
VANA AGND1
CAP
R1IN
R2IN
R3IN
4R
2R
R
4k
2.5V
REFERENCE
AD977/
AD977A
SERIAL
4R
SWITCHED
DATA
CAP ADC
INTERFACE
AGND2
VDIG
R = 5kAD977
R = 2.5kAD977A
CONTROL LOGIC &
INTERNAL CALIBRATION CIRCUITRY
CLOCK
SYNC
BUSY
DATACLK
DATA
DGND PWRD R/C CS TAG SB/BTC EXT/INT
GENERAL DESCRIPTION
The AD977/AD977A is a high speed, low power 16-bit A/D
converter that operates from a single 5 V supply. The AD977A
has a throughput rate of 200 kSPS whereas the AD977 has a
throughput rate of 100 kSPS. Each part contains a successive
approximation, switched capacitor ADC, an internal 2.5 V
reference, and a high speed serial interface. The ADC is factory
calibrated to minimize all linearity errors. The AD977/AD977A is
specified for full scale bipolar input ranges of ± 10 V, ± 5 V and
±3.3 V, and unipolar ranges of 0 V to 10 V, 0 V to 5 V and
0 V to 4 V.
The AD977/AD977A is comprehensively tested for ac param-
eters such as SNR and THD, as well as the more traditional dc
parameters of offset, gain and linearity.
PRODUCT HIGHLIGHTS
1. Fast Throughput
The AD977/AD977A is a high speed, 16-bit ADC based on
a factory calibrated switched capacitor architecture.
2. Single-Supply Operation
The AD977/AD977A operates from a single 5 V supply and
dissipates only 100 mW max.
3. Comprehensive DC and AC Specifications
In addition to the traditional specifications of offset, gain
and linearity, the AD977/AD977A is fully tested for SNR
and THD.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000

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AD977/AD977A
AD977–SPECIFICATIONS (–40؇C to +85؇C, FS = 100 kHz, VDIG = VANA = 5 V, unless otherwise noted)
Parameter
A Grade
Min Typ Max
B Grade
Min Typ Max
C Grade
Min Typ Max
Unit
RESOLUTION
16
16
16 Bits
ANALOG INPUT
Voltage Range
Impedance
Sampling Capacitance
± 10 V, 0 V to 5 V, . . . (See Table II)
See Table II
40 40
40
pF
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
10 10 10 µs
100 100 100 kHz
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise2
Full-Scale Error3, 4
Full-Scale Error Drift
Full-Scale Error
Ext. REF = 2.5 V
Full-Scale Error Drift
Ext. REF = 2.5 V
Bipolar Zero Error3
Bipolar Ranges
Bipolar Zero Error Drift
Bipolar Ranges
Unipolar Zero Error3
Unipolar Ranges
Unipolar Zero Error Drift
Unipolar Ranges
Recovery to Rated Accuracy
After Power-Down5
2.2 µF to CAP
Power Supply Sensitivity
VANA = VDIG = VD = 5 V ± 5%
AC ACCURACY
Spurious Free Dynamic Range6
Total Harmonic Distortion6
Signal-to-(Noise+Distortion)6
–60 dB Input
Signal-to-Noise6
Full Power Bandwidth8
–3 dB Input Bandwidth
–2
15
1.0
±7
±2
±2
±2
±3
+3
± 0.5
± 0.5
± 10
± 10
1
±8
90
–90
83
27
83
700
1.5
–1
16
1.0
±7
±2
±2
±2
± 2.0
+1.75
± 0.25
± 0.25
± 10
± 10
1
96
85
28
85
700
1.5
±8
–96
±3
±2
15
1.0
± 0.5
±7
± 0.5
±2
± 15
±2
± 10
±2
1
±8
90
–90
83
27
83
700
1.5
LSB1
LSB
Bits
LSB
%
ppm/°C
%
ppm/°C
mV
ppm/°C
mV
ppm/°C
ms
LSB
dB7
dB
dB
dB
dB
kHz
MHz
SAMPLING DYNAMICS
Aperture Delay
Transient Response, Full-Scale Step
Overvoltage Recovery9
40
2
150
40
2
150
40
2
150
ns
µs
ns
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
Ext. REF = 2.5 V
2.48 2.5
1
2.3 2.5
2.52
2.7
100
2.48 2.5
1
2.3 2.5
2.52
2.7
100
2.48 2.5 2.52
1
2.3 2.5 2.7
100
V
µA
V
µA
NOTES
1LSB means Least Significant Bit. With a ± 10 V input, one LSB is 305 µV.
2Typical rms noise at worst case transitions and temperatures.
3Measured with fixed resistors as shown in Figures 11, 12 and 13. Adjustable to zero. Tested at room temperature.
4Full-Scale Error is expressed as the % difference between the actual full-scale code transition voltage and the ideal full scale transition voltage, and includes the effect of offset
error. For bipolar input ranges, the Full-Scale Error is the worst case of either the –Full Scale or +Full Scale code transition voltage errors. For unipolar input ranges, Full-Scale
Error is with respect to the +Full-Scale code transition voltage.
5External 2.5 V reference connected to REF.
6fIN = 20 kHz, 0.5 dB down unless otherwise noted.
7All specifications in dB are referred to a full scale ± 10 V input.
8Full-Power Bandwidth is defined as full-scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60 dB, or 10 bits of accuracy.
9Recovers to specified performance after a 2 × FS input overvoltage.
Specifications subject to change without notice.
–2– REV. D

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AD977/AD977A
AD977A–SPECIFICATIONS (–40؇C to +85؇C, FS = 200 kHz, VDIG = VANA = 5 V, unless otherwise noted)
Parameter
A Grade
Min Typ Max
B Grade
Min Typ Max
C Grade
Min Typ Max
Unit
RESOLUTION
16
16
16 Bits
ANALOG INPUT
Voltage Range
Impedance
Sampling Capacitance
± 10 V, 0 V to 5 V, . . . (See Table II)
See Table II
40 40
40
pF
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
5 5 5 µs
200 200 200 kHz
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise2
Full-Scale Error3, 4
Full-Scale Error Drift
Full-Scale Error
Ext. REF = 2.5 V
Full-Scale Error Drift
Ext. REF = 2.5 V
Bipolar Zero Error3
Bipolar Ranges
Bipolar Zero Error Drift
Bipolar Ranges
Unipolar Zero Error3
Unipolar Ranges
Unipolar Zero Error Drift
Unipolar Ranges
Recovery to Rated Accuracy
After Power-Down5
2.2 µF to CAP
Power Supply Sensitivity
VANA = VDIG = VD = 5 V ± 5%
AC ACCURACY
Spurious Free Dynamic Range6
Total Harmonic Distortion6
Signal-to-(Noise+Distortion)6
–60 dB Input
Signal-to-Noise6
Full Power Bandwidth8
–3 dB Input Bandwidth
–2
15
1.0
±7
±2
±2
±2
±3
+3
± 0.5
± 0.5
± 10
± 10
1
90
83
27
83
1
2.7
±8
–90
–1
16
1.0
±7
±2
±2
±2
± 2.0
+1.75
± 0.25
± 0.25
± 10
± 10
1
96
85
28
85
1
2.7
±8
–96
±3
±2
15
1.0
± 0.5
±7
± 0.5
±2
± 15
±2
± 10
±2
1
±8
90
–90
83
27
83
1
2.7
LSB1
LSB
Bits
LSB
%
ppm/°C
%
ppm/°C
mV
ppm/°C
mV
ppm/°C
ms
LSB
dB7
dB
dB
dB
dB
MHz
MHz
SAMPLING DYNAMICS
Aperture Delay
Transient Response, Full-Scale Step
Overvoltage Recovery9
40
1
150
40
1
150
40
1
150
ns
µs
ns
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
Ext. REF = 2.5 V
2.48 2.5
1
2.3 2.5
2.52
2.7
1.2
2.48 2.5
1
2.3 2.5
2.52
2.7
1.2
2.48 2.5 2.52
1
2.3 2.5 2.7
1.2
V
µA
V
mA
NOTES
1LSB means Least Significant Bit. With a ± 10 V input, one LSB is 305 µV.
2Typical rms noise at worst case transitions and temperatures.
3Measured with fixed resistors as shown in Figures 11, 12 and 13. Adjustable to zero. Tested at room temperature.
4Full-Scale Error is expressed as the % difference between the actual full-scale code transition voltage and the ideal full scale transition voltage, and includes the effect of offset
error. For bipolar input ranges, the Full-Scale Error is the worst case of either the –Full Scale or +Full Scale code transition voltage errors. For unipolar input ranges, Full-Scale
Error is with respect to the +Full-Scale code transition voltage.
5External 2.5 V reference connected to REF.
6fIN = 20 kHz, 0.5 dB down unless otherwise noted.
7All specifications in dB are referred to a full scale ± 10 V input.
8Full-Power Bandwidth is defined as full-scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60 dB, or 10 bits of accuracy.
9Recovers to specified performance after a 2 × FS input overvoltage.
Specifications subject to change without notice.
REV. D
–3–

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AD977/AD977A–SPECIFICATIONS (Both Specs)
Parameter
Conditions
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
IIH
DIGITAL OUTPUTS
Data Format
Data Coding
Pipeline Delay
VOL
VOH
POWER SUPPLIES
Specified Performance
VDIG
VANA
IDIG
IANA
Power Dissipation
PWRD LOW
PWRD HIGH
ISINK = 1.6 mA
ISOURCE = 500 µA
TEMPERATURE RANGE
Specified Performance
TMIN to TMAX
Specifications subject to change without notice.
A, B, C Grades
Min Typ
Max
–0.3 +0.8
2.0 VDIG + 0.3
± 10
± 10
Serial 16-Bits
Binary Two’s Complement or Straight Binary
Conversion Results Only Available after Completed Conversion
0.4
4
4.75 5
4.75 5
4
11
50
–40
5.25
5.25
100
+85
TIMING SPECIFICATIONS (AD977A: FS = 200 kHz, AD977: FS = 100 kHz, VDIG = VANA = 5 V, –40؇C to +85؇C)
Symbol
AD977A
Min Typ Max
AD977
Min Typ Max
Convert Pulsewidth
R/C, CS to BUSY Delay
BUSY LOW Time
BUSY Delay after End of Conversion
Aperture Delay
Conversion Time
Acquisition Time
Throughput Time
R/C Low to DATACLK Delay
DATACLK Period
DATA Valid Setup Time
DATA Valid Hold Time
EXT. DATACLK Period
EXT. DATACLK HIGH
EXT. DATACLK LOW
R/C, CS to EXT. DATACLK Setup Time
R/C to CS Setup Time
EXT. DATACLK to SYNC Delay
EXT. DATACLK to DATA Valid Delay
CS to EXT. DATACLK Rising Edge Delay
Previous DATA Valid after CS, R/C Low
BUSY to EXT. DATACLK Setup Time
Final EXT. DATACLK to BUSY Rising Edge
TAG Valid Setup Time
TAG Valid Hold Time
t1
t2
t3
t4
t5
t6
t7
t6 + t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
t21
t22
t23
t24
50 50
83 83
4.0 8.0
50 50
40 40
3.8 4.0
7.6 8.0
1.0 2.0
5 10
220 350
220 450
50 100
20 20
66 100
20 20
30 30
20 t12 + 5 20 t12 + 5
10 10
15 66 15 66
25 66 25 66
10 10
3.5 7.5
55
1.7 3.5
00
20 20
Specifications subject to change without notice.
Unit
V
V
µA
µA
V
V
V
V
mA
mA
mW
µW
°C
Unit
ns
ns
µs
ns
ns
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
µs
ns
ns
–4– REV. D

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AD977/AD977A
ABSOLUTE MAXIMUM RATINGS1
Analog Inputs
R1IN, R2IN , R3IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
CAP . . . . . . . . . . . . . . . . .+VANA + 0.3 V to AGND2 – 0.3 V
REF . . . . . . . . . . . . . . . . . . . . . Indefinite Short to AGND2,
. . . . . . . . . . . . . . . . . . . . . . . . . Momentary Short to VANA
Ground Voltage Differences
DGND, AGND1, AGND2 . . . . . . . . . . . . . . . . . . . ± 0.3 V
Supply Voltages
VANA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VDIG to VANA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 7 V
VDIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Digital Inputs . . . . . . . . . . . . . . . . . . . –0.3 V to VDIG + 0.3 V
Internal Power Dissipation2
PDIP (N), SOIC (R), SSOP (RS) . . . . . . . . . . . . . 700 mW
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage Temperature Range N, R . . . . . . . . –65°C to +150°C
Lead Temperature Range
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
20-Lead PDIP: θJA = 100°C/W, θJC = 31°C/W,
20-Lead SOIC: θJA = 75°C/W, θJC = 24°C/W,
28-Lead SSOP: θJA = 109°C/W, θJC = 39°C/W.
PIN CONFIGURATIONS
SOIC and DIP
SSOP
R1IN 1
20 VDIG
AGND1 2
19 VANA
R2IN 3
18 PWRD
R3IN 4
CAP 5
AD977 17 BUSY
AD977A 16 CS
REF
6
TOP VIEW
(Not to Scale)
15
R/C
AGND2 7
14 TAG
SB/BTC 8
13 DATA
EXT/INT 9
12 DATACLK
DGND 10
11 SYNC
R1IN 1
AGND1 2
28 VDIG
27 VANA
R2IN 3
26 PWRD
R3IN 4
25 BUSY
NC 5
24 CS
CAP 6 AD977 23 NC
REF 7 AD977A 22 NC
NC
8
TOP VIEW
(Not to Scale)
21
R/C
AGND2 9
20 NC
NC 10
19 TAG
NC 11
18 NC
SB/BTC 12
17 DATA
EXT/INT 13
16 DATACLK
DGND 14
15 SYNC
NC = NO CONNECT
1.6mA IOL
TO OUTPUT
PIN
CL
100pF
500A
IOH
1.4V
Figure 1. Load Circuit for Digital Interface Timing
ORDERING GUIDE
Model
Temperature
Range
Throughput
Rate
AD977AN
AD977BN
AD977CN
AD977AAN
AD977ABN
AD977ACN
AD977AR
AD977BR
AD977CR
AD977AAR
AD977ABR
AD977ACR
AD977ARS
AD977BRS
AD977CRS
AD977AARS
AD977ABRS
AD977ACRS
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
100 kSPS
100 kSPS
100 kSPS
200 kSPS
200 kSPS
200 kSPS
100 kSPS
100 kSPS
100 kSPS
200 kSPS
200 kSPS
200 kSPS
100 kSPS
100 kSPS
100 kSPS
200 kSPS
200 kSPS
200 kSPS
*N = 20-lead 300 mil plastic DIP; R = 20-lead SOIC; RS = 28-lead SSOP.
Max INL
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
± 3.0 LSB
± 2.0 LSB
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD977/AD977A feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Min S/(N+D)
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
83 dB
85 dB
83 dB
Package
Options*
N-20
N-20
N-20
N-20
N-20
N-20
R-20
R-20
R-20
R-20
R-20
R-20
RS-28
RS-28
RS-28
RS-28
RS-28
RS-28
WARNING!
ESD SENSITIVE DEVICE
REV. D
–5–