AD9883.pdf 데이터시트 (총 24 페이지) - 파일 다운로드 AD9883 데이타시트 다운로드

No Preview Available !

a
FEATURES
110 MSPS Maximum Conversion Rate
300 MHz Analog Bandwidth
0.5 V to 1.0 V Analog Input Range
500 ps p-p PLL Clock Jitter at 110 MSPS
3.3 V Power Supply
Full Sync Processing
Sync Detect for ”Hot Plugging”
Midscale Clamping
Power-Down Mode
Low Power: 500 mW Typical
Composite Sync Applications Require an External Coast
APPLICATIONS
RGB Graphics Processing
LCD Monitors and Projectors
Plasma Display Panels
Scan Converters
Microdisplays
Digital TV
110 MSPS Analog Interface for
Flat Panel Displays
AD9883
FUNCTIONAL BLOCK DIAGRAM
RAIN
GAIN
BAIN
HSYNC
COAST
CLAMP
FILT
SCL
SDA
A0
CLAMP
8
A/D
ROUTA
CLAMP
8
A/D
GOUTA
CLAMP
8
A/D
SYNC
PROCESSING
AND CLOCK
GENERATION
SERIAL REGISTER
AND
POWER MANAGEMENT
REF
AD9883
BOUTA
MIDSCV
DTACK
HSOUT
VSOUT
SOGOUT
REF
BYPASS
GENERAL DESCRIPTION
The AD9883 is a complete 8-bit, 110 MSPS monolithic analog
interface optimized for capturing RGB graphics signals from
personal computers and workstations. Its 110 MSPS encode
rate capability and full-power analog bandwidth of 300 MHz
supports resolutions up to SXGA (1280 × 1024 at 60 Hz).
The AD9883 includes a 110 MHz triple ADC with internal
1.25 V reference, a PLL, and programmable gain, offset, and
clamp control. The user provides only a 3.3 V power supply,
analog input, and HSYNC and COAST signals. Three-state
CMOS outputs may be powered from 2.5 V to 3.3 V.
The AD9883’s on-chip PLL generates a pixel clock from HSYNC
and COAST inputs. Pixel clock output frequencies range from
12 MHz to 110 MHz. PLL clock jitter is 500 ps p-p typical at
110 MSPS. When the COAST signal is presented, the PLL
maintains its output frequency in the absence of HSYNC. A
sampling phase adjustment is provided. Data, HSYNC and
Clock output phase relationships are maintained. The AD9883
also offers full sync processing for composite sync and sync-on-
green applications.
A clamp signal is generated internally or may be provided by the
user through the CLAMP input pin. This interface is fully pro-
grammable via a two-wire serial interface.
Fabricated in an advanced CMOS process, the AD9883 is
provided in a space-saving 80-lead LQFP surface mount plastic
package and is specified over the 0°C to 70°C temperature range.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001

No Preview Available !

AD9883–SPECIFICATIONS
Analog Interface (VD = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate)
Parameter
Temp
Test
Level
AD9883KST-110
Min Typ
RESOLUTION
8
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
25°C
Full
25°C
Full
Full
I
VI
I
VI
VI
± 0.5
± 0.5
Guaranteed
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Offset Voltage
Input Full-Scale Matching
Offset Adjustment Range
Full
Full
25°C
25°C
Full
Full
Full
Full
VI
VI
V
IV
IV
VI
VI
VI
1.0
100
7
46 49
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
Full VI
Full V
1.20 1.25
± 50
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Data to Clock Skew
tBUFF
tSTAH
tDHO
tDAL
tDAH
tDSU
tSTASU
tSTOSU
HSYNC Input Frequency
Maximum PLL Clock Rate
Minimum PLL Clock Rate
PLL Jitter
Sampling Phase Tempco
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
VI
IV
IV
VI
VI
VI
VI
VI
VI
VI
VI
IV
VI
IV
IV
IV
IV
110
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
110
400
15
DIGITAL INPUTS
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Capacitance
Full
Full
Full
Full
25°C
VI
VI
V
V
V
2.5
3
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Output Voltage, Low (VOL)
Duty Cycle DATACK
Output Coding
Full VI
Full VI
Full IV
VD – 0.1
45
50
Binary
Max
+1.25/–1.0
+1.35/–1.0
± 1.85
± 2.0
0.5
1
1
50
6.0
52
1.32
10
+2.0
110
12
7001
10001
0.8
–1.0
1.0
0.1
55
Unit
Bits
LSB
LSB
LSB
LSB
V p–p
V p–p
ppm/°C
µA
µA
mV
% FS
% FS
V
ppm/°C
MSPS
MSPS
ns
µs
µs
µs
µs
µs
µs
µs
µs
kHz
MHz
MHz
ps p-p
ps p-p
ps/°C
V
V
µA
µA
pF
V
V
%
–2– REV. 0

No Preview Available !

Parameter
Temp
POWER SUPPLY
VD Supply Voltage
VDD Supply Voltage
PVD Supply Voltage
ID Supply Current (VD)
IDD Supply Current (VDD)2
IPVD Supply Current (PVD)
Total Power Dissipation
Power-Down Supply Current
Power-Down Dissipation
Full
Full
Full
25°C
25°C
25°C
Full
Full
Full
DYNAMIC PERFORMANCE
Analog Bandwidth, Full Power
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
fIN = 40.7 MHz
Crosstalk
25°C
25°C
25°C
25°C
Full
Full
THERMAL CHARACTERISTICS
θJC Junction-to-Case
Thermal Resistance
θJA Junction-to-Ambient
Thermal Resistance
NOTES
1VCO Range = 10, Charge Pump Current = 110, PLL Divider = 1693.
2DATACK Load = 15 pF, Data Load = 5 pF.
Specifications subject to change without notice.
Test
Level
IV
IV
IV
V
V
V
VI
VI
VI
V
V
V
V
V
V
V
V
AD9883KST-110
Min Typ Max
3.0 3.3 3.6
2.2 3.3 3.6
3.0 3.3 3.6
132
19
8
525 650
5 10
16.5 33
300
2
1.5
44
43
55
AD9883
Unit
V
V
V
mA
mA
mA
mW
mA
mW
MHz
ns
ns
dB
dB
dBc
16 °C/W
35 °C/W
REV. 0
–3–

No Preview Available !

AD9883
ABSOLUTE MAXIMUM RATINGS*
VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 V
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 V
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . VD to 0.0 V
VREF IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VD to 0.0 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V to 0.0 V
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Operating Temperature . . . . . . . . . . . . . . . . . –25°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 175°C
Maximum Case Temperature . . . . . . . . . . . . . . . . . . . . 150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions outside of those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may affect device reliability.
EXPLANATION OF TEST LEVELS
Test Level
I 100% production tested.
II 100% production tested at 25°C and sample tested at
specified temperatures.
III Sample tested only.
IV Parameter is guaranteed by design and characterization testing.
V Parameter is a typical value only.
VI 100% production tested at 25°C; guaranteed by design and
characterization testing.
Model
AD9883KST-110
AD9883/PCB
ORDERING GUIDE
Temperature
Range
0°C to 70°C
25°C
Package
Description
Thin Plastic Quad Flatpack
Evaluation Board
Package
Option
ST-80
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9883 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– REV. 0

No Preview Available !

PIN CONFIGURATION
AD9883
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
GND 1
GREEN <7> 2
GREEN <6> 3
GREEN <5> 4
GREEN <4> 5
GREEN <3> 6
GREEN <2> 7
GREEN <1> 8
GREEN <0> 9
GND 10
VDD 11
BLUE <7> 12
BLUE <6> 13
BLUE <5> 14
BLUE <4> 15
BLUE <3> 16
BLUE <2> 17
BLUE <1> 18
BLUE <0> 19
GND 20
PIN 1
IDENTIFIER
AD9883
TOP VIEW
(Not to Scale)
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
60 GND
59 VD
58 REF BYPASS
57 SDA
56 SCL
55 A0
54 RAIN
53 GND
52 VD
51 VD
50 GND
49 SOGIN
48 GAIN
47 GND
46 VD
45 VD
44 GND
43 BAIN
42 VD
41 GND
NC = NO CONNECT
Table I. Complete Pinout List
Pin
Type
Inputs
Outputs
References
Power Supply
Control
Mnemonic Function
RAIN
GAIN
BAIN
HSYNC
VSYNC
SOGIN
CLAMP
COAST
Analog Input for Converter R
Analog Input for Converter G
Analog Input for Converter B
Horizontal SYNC Input
Vertical SYNC Input
Input for Sync-on-Green
Clamp Input (External CLAMP Signal)
PLL COAST Signal Input
Red [7:0]
Green [7:0]
Blue [7:0]
DATACK
HSOUT
VSOUT
SOGOUT
Outputs of Converter “Red,” Bit 7 Is the MSB
Outputs of Converter “Green,” Bit 7 Is the MSB
Outputs of Converter “Blue,” Bit 7 Is the MSB
Data Output Clock
HSYNC Output Clock (Phase-Aligned with DATACK)
VSYNC Output Clock (Phase-Aligned with DATACK)
Sync on Green Slicer Output
REF BYPASS Internal Reference Bypass
MIDSCV
Internal Midscale Voltage Bypass
FILT
Connection for External Filter Components for Internal PLL
VD
VDD
PVD
GND
Analog Power Supply
Output Power Supply
PLL Power Supply
Ground
SDA
SCL
A0
Serial Port Data I/O
Serial Port Data Clock (100 kHz Maximum)
Serial Port Address Input 1
Value
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
1.25 V ± 10%
3.3 V ± 10%
3.3 V ± 10%
3.3 V ± 10%
0V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
Pin
Number
54
48
43
30
31
49
38
29
70–77
2–9
12–19
67
66
64
65
58
37
33
57
56
55
REV. 0
–5–