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a
FEATURES
Industrial Temperature Range Operation
140 MSPS Maximum Conversion Rate
300 MHz Analog Bandwidth
0.5 V to 1.0 V Analog Input Range
500 ps p-p PLL Clock Jitter at 110 MSPS
3.3 V Power Supply
Full Sync Processing
Sync Detect for Hot Plugging
Midscale Clamping
Power-Down Mode
Low Power: 500 mW Typical
4:2:2 Output Format Mode
APPLICATIONS
RGB Graphics Processing
LCD Monitors and Projectors
Plasma Display Panels
Scan Converters
Microdisplays
Digital TV
110 MSPS/140 MSPS Analog Interface
for Flat Panel Displays
AD9883A
FUNCTIONAL BLOCK DIAGRAM
RAIN
GAIN
BAIN
HSYNC
COAST
CLAMP
FILT
SCL
SDA
A0
CLAMP
8
A/D
ROUTA
CLAMP
8
A/D
GOUTA
CLAMP
8
A/D
SYNC
PROCESSING
AND CLOCK
GENERATION
SERIAL REGISTER
AND
POWER MANAGEMENT
REF
AD9883A
BOUTA
MIDSCV
DTACK
HSOUT
VSOUT
SOGOUT
REF
BYPASS
GENERAL DESCRIPTION
The AD9883A is a complete 8-bit, 140 MSPS, monolithic analog
interface optimized for capturing RGB graphics signals from
personal computers and workstations. Its 140 MSPS encode
rate capability and full power analog bandwidth of 300 MHz
supports resolutions up to SXGA (1280 × 1024 at 75 Hz).
The AD9883A includes a 140 MHz triple ADC with internal
1.25 V reference, a PLL, and programmable gain, offset, and
clamp control. The user provides only a 3.3 V power supply,
analog input, and Hsync and COAST signals. Three-state
CMOS outputs may be powered from 2.5 V to 3.3 V.
The AD9883A’s on-chip PLL generates a pixel clock from the
Hsync input. Pixel clock output frequencies range from 12 MHz to
140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS.
When the COAST signal is presented, the PLL maintains its
output frequency in the absence of Hsync. A sampling phase
adjustment is provided. Data, Hsync, and clock output phase
relationships are maintained. The AD9883A also offers full sync
processing for composite sync and sync-on-green applications.
A clamp signal is generated internally or may be provided by
the user through the CLAMP input pin. This interface is fully
programmable via a 2-wire serial interface.
Fabricated in an advanced CMOS process, the AD9883A is pro-
vided in a space-saving 80-lead LQFP surface-mount plastic package
and is specified over the –40°C to +85°C temperature range.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.

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AD9883A–SPECIFICATIONS
Analog Interface (VD = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate, unless otherwise noted.)
Parameter
Test AD9883AKST-110
Temp Level Min Typ
Max
AD9883AKST-140
Min Typ
Max
Unit
RESOLUTION
8 8 Bits
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
25°C
Full
25°C
Full
Full
I
VI
I
VI
VI
± 0.5 +1.25/–1.0
+1.35/–1.0
± 0.5 ± 1.85
± 2.0
Guaranteed
± 0.5 +1.35/–1.0
+1.45/–1.0
± 0.5 ± 2.0
± 2.3
Guaranteed
LSB
LSB
LSB
LSB
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Offset Voltage
Input Full-Scale Matching
Offset Adjustment Range
Full
Full
25°C
25°C
Full
Full
Full
Full
VI
VI
V
IV
IV
VI
VI
VI
1.0
100
7
1.5
46 49
0.5
1
1
50
6.0
52
1.0
100
7
1.5
46 49
0.5
1
1
70
8.0
52
V p-p
V p-p
ppm/°C
µA
µA
mV
% FS
% FS
REFERENCE OUTPUT
Output Voltage
Full VI 1.20 1.25 1.32 1.20 1.25 1.32 V
Temperature Coefficient
Full V
± 50
± 50 ppm/°C
SWITCHING PERFORMANCE
Maximum Conversion Rate Full
Minimum Conversion Rate Full
Data to Clock Skew
Full
tBUFF
tSTAH
tDHO
tDAL
tDAH
tDSU
tSTASU
tSTOSU
HSYNC Input Frequency
Full
Full
Full
Full
Full
Full
Full
Full
Full
Maximum PLL Clock Rate Full
Minimum PLL Clock Rate
Full
PLL Jitter
25°C
Full
Sampling Phase Tempco
Full
VI
IV
IV
VI
VI
VI
VI
VI
VI
VI
VI
IV
VI
IV
IV
IV
IV
110
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
110
400
15
10
+2.0
110
12
7001
10001
140
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
140
400
15
10
+2.0
110
12
7001
10001
MSPS
MSPS
ns
µs
µs
µs
µs
µs
ns
µs
µs
kHz
MHz
MHz
ps p-p
ps p-p
ps/°C
DIGITAL INPUTS
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Capacitance
Full
Full
Full
Full
25°C
VI
VI
V
V
V
2.5
3
2.5
0.8
–1.0
+1.0
3
V
0.8 V
–1.0 µA
+1.0 µA
pF
–2– REV. B

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Parameter
Test
AD9883AKST-110
Temp Level Min Typ
Max
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Output Voltage, Low (VOL)
Duty Cycle DATACK
Output Coding
Full VI
Full VI
Full IV
VD – 0.1
45 50
Binary
0.1
55
POWER SUPPLY
VD Supply Voltage
VDD Supply Voltage
PVD Supply Voltage
ID Supply Current (VD)
IDD Supply Current (VDD)2
IPVD Supply Current (PVD)
Total Power Dissipation
Power-Down Supply Current
Power-Down Dissipation
Full
Full
Full
25°C
25°C
25°C
Full
Full
Full
IV
IV
IV
V
V
V
VI
VI
VI
3.0
2.2
3.0
3.3
3.3
3.3
132
19
8
525
5
16.5
3.6
3.6
3.6
650
10
33
DYNAMIC PERFORMANCE
Analog Bandwidth, Full Power
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
fIN = 40.7 MHz
Crosstalk
25°C
25°C
25°C
25°C
Full
Full
V
V
V
V
V
V
300
2
1.5
44
43
55
THERMAL CHARACTERISTICS
θJC Junction-to-Case
Thermal Resistance
θJA Junction-to-Ambient
Thermal Resistance
V
V
16
35
NOTES
1VCO Range = 10, Charge Pump Current = 110, PLL Divider = 1693.
2DATACK Load = 15 pF, Data Load = 5 pF.
Specifications subject to change without notice.
AD9883A
AD9883AKST-140
Min Typ Max
Unit
VD – 0.1
45 50
Binary
0.1
55
V
V
%
3.15 3.3
3.6
2.2 3.3 3.6
3.0 3.3 3.6
180
26
11
650 800
5 10
16.5 33
V
V
V
mA
mA
mA
mW
mA
mW
300 MHz
2 ns
1.5 ns
43 dB
42 dB
55 dBc
16 °C/W
35 °C/W
REV. B
–3–

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AD9883A
Analog Interface (VD = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate, unless otherwise noted.)
Parameter
Test AD9883ABST–110
Temp Level Min Typ
Max
AD9883ABST–140
Min Typ Max
RESOLUTION
88
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
25°C
Full
25°C
Full
I
VI
I
VI
± 0.5 +1.25/–1.0
+1.5/–1.0
± 0.5 ± 1.85
± 3.2
± 0.5 +1.5/–1.0
+1.81/–1.0
± 0.5 ± 1.85
± 3.2
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Offset Voltage
Input Full-Scale Matching
Offset Adjustment Range
Full
Full
25°C
25°C
Full
Full
Full
Full
VI
VI
V
IV
IV
VI
VI
VI
1.0
46
100
7
1.5
49
0.5
1
2
75
8.0
52
0.5
1.0
100
1
2
7 75
1.5 10.0
46 49 52
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
Full VI
Full V
1.19 1.25
± 100
1.33
1.19 1.25 1.33
± 100
SWITCHING PERFORMANCE
Maximum Conversion Rate Full VI 110
Minimum Conversion Rate Full IV
Data to Clock Skew
Full IV –0.5
tBUFF
tSTAH
tDHO
tDAL
tDAH
tDSU
tSTASU
tSTOSU
HSYNC Input Frequency
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full IV
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
Maximum PLL Clock Rate Full VI 110
Minimum PLL Clock Rate
Full IV
PLL Jitter
25°C IV
400
Full IV
Sampling Phase Tempco
Full IV
15
10
+2.0
110
12
7001
11001
140
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
140
400
15
10
+2.0
110
12
7001
11001
DIGITAL INPUTS
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Current, High (IIH)
Input Current, Low (IIL)
Input Capacitance
Full VI
Full VI
Full V
Full V
+25°C V
2.5
3
2.5
0.8 0.8
–1.0 –1.0
1.0 1.0
3
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Output Voltage, Low (VOL)
Duty Cycle, DATACK
Output Coding
Full VI
Full VI
Full IV
VD – 0.1
45 50
Binary
0.1
55
VD – 0.1
45 50
Binary
0.1
55
Unit
Bits
LSB
LSB
LSB
LSB
V p-p
V p-p
ppm/°C
µA
µA
mV
% FS
% FS
V
ppm/°C
MSPS
MSPS
ns
µs
µs
µs
µs
µs
µs
µs
µs
kHz
MHz
MHz
ps p-p
ps p-p
ps/°C
V
V
µA
µA
pF
V
V
%
–4– REV. B

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Parameter
Test
AD9883ABST–110
Temp Level Min Typ
Max
POWER SUPPLY
VD Supply Voltage
VDD Supply Voltage
PVD Supply Voltage
ID Supply Current (VD)
IDD Supply Current (VDD)2
IPVD Supply Current (PVD)
Total Power Dissipation
Power-Down Supply Current
Power-Down Dissipation
Full
Full
Full
25°C
25°C
25°C
Full
Full
Full
IV
IV
IV
V
V
V
VI
VI
VI
3.0
2.2
3.0
3.3
3.3
3.3
132
19
8
525
5
16.5
3.6
3.6
3.6
700
15
33
DYNAMIC PERFORMANCE
Analog Bandwidth, Full Power
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
fIN = 40.7 MHz
Crosstalk
25°C
25°C
25°C
25°C
Full
Full
V
V
V
V
V
V
300
2
1.5
44
43
55
THERMAL CHARACTERISTICS
θJC Junction-to-Case
Thermal Resistance
V
θJA Junction-to-Ambient
Thermal Resistance
V
16
35
NOTES
1VCO Range = 10, Charge Pump Current = 110, PLL Divider = 1693.
2DATACK Load = 15 pF, Data Load = 5 pF.
Specifications subject to change without notice.
AD9883A
AD9883ABST–140
Min Typ Max
Unit
3.0 3.3 3.6
2.2 3.3 3.6
3.0 3.3 3.6
163
24
10
650 850
5 15
16.5 33
V
V
V
mA
mA
mA
mW
mA
mW
300 MHz
2 ns
1.5 ns
43 dB
42 dB
55 dBc
16
°C/W
35
°C/W
REV. B
–5–