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2SJ517
Silicon P Channel MOS FET
High Speed Power Switching
Features
Low on-resistance
RDS(on) = 0.18 typ. (at VGS =–4V, ID =–1A)
Low drive current
High speed switching
2.5V gate drive devices.
Outline
UPAK
ADE-208-575B (Z)
3rd. Edition
Jun 1998
1
2
3
D
4
G
S
1. Gate
2. Drain
3. Source
4. Drain

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2SJ517
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Channel dissipation
VDSS
VGSS
ID
I Note1
D(pulse)
I DR
Pch Note2
–20
±10
–2
–4
–2
1
Channel temperature
Tch 150
Storage temperature
Tstg –55 to +150
Note: 1. PW 100µs, duty cycle 10 %
2. When using aluminium ceramic board (12.5 x 20 x 0.7 mm)
Electrical Characteristics (Ta = 25°C)
Unit
V
V
A
A
A
W
°C
°C
Item
Symbol Min
Drain to source breakdown voltage V(BR)DSS
Gate to source breakdown voltage V(BR)GSS
Zero gate voltege drain current IDSS
Gate to source leak current
I GSS
Gate to source cutoff voltage
VGS(off)
Static drain to source on state
resistance
RDS(on)
–20
±10
–0.5
Static drain to source on state
resistance
RDS(on)
Forward transfer admittance
Input capacitance
|yfs|
Ciss
1.8
Output capacitance
Coss —
Reverse transfer capacitance
Crss
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body–drain diode forward voltage
Body–drain diode reverse
recovery time
t d(on)
tr
t d(off)
tf
VDF
t rr
Note: 3. Pulse test
4. Marking is “YY”.
Typ Max
——
——
— –10
±10
— –1.5
0.18 0.24
0.27 0.43
3.0
320
190
90
14
75
90
90
–0.95
70
Unit
V
V
µA
µA
V
S
pF
pF
pF
ns
ns
ns
ns
V
ns
Test Conditions
ID = –10mA, VGS = 0
IG = ±100µA, VDS = 0
VDS = –20 V, VGS = 0
VGS = ±8V, VDS = 0
ID = –1mA, VDS = –10V
ID = –1A, VGS = –4VNote3
ID = –1A, VGS = –2.5V Note3
ID = –1A, VDS = –10V Note3
VDS = –10V
VGS = 0
f = 1MHz
ID = –1A, RL = 10
VGS = –4V
IF = –2A, VGS = 0
IF = –2A, VGS = 0
diF/ dt =50A/µs
2

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Main Characteristics
2SJ517
Power vs. Temperature Derating
2.0
Test Condition :
When using the aliminium Ceramic
board (12.5 x 20 x 70 mm)
1.5
1.0
0.5
0 50 100 150 200
Ambient Temperature Ta (°C)
Maximum Safe Operation Area
–10
–3 10 µs
–1
–0.3
–0.1
Operation in
this area is
limited by R DS(on)
–0.03
–0.01 Ta = 25 °C
–0.1 –0.3 –1 –3 –10 –30 –100
Drain to Source Voltage V DS (V)
Typical Output Characteristics
–5
–10 V
Pulse Test
–4 V
–4 –3 V
–2.5 V
–3
–2 –2 V
–1
VGS = –1.5 V
0 –2 –4 –6 –8 –10
Drain to Source Voltage V DS (V)
Typical Transfer Characteristics
–5
–4
–25°C
–3 25°C
Tc = 75°C
–2
–1
V DS = –10 V
Pulse Test
0 –1 –2 –3 –4 –5
Gate to Source Voltage V GS (V)
3

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2SJ517
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–1.0
Pulse Test
–0.8
–0.6
–0.4
I D = –2 A
–0.2
–1 A
–0.5 A
0 –2 –4 –6 –8 –10
Gate to Source Voltage V GS (V)
Static Drain to Source on State Resistance
vs. Drain Current
1
0.5
VGS = –2.5 V
0.2
–4 V
0.1
0.05
0.02
Pulse Test
0.01
–0.1 –0.2 –0.5 –1 –2 –5
Drain Current I D (A)
–10
Static Drain to Source on State Resistance
vs. Temperature
0.5
Pulse Test
I D = –2 A
0.4
0.3 VGS = –2.5 V
–1 A
–0.5 A
0.2
–4 V
0.1
–0.5, –1, –2 A
0
–40 0 40 80 120 160
Case Temperature Tc (°C)
Forward Transfer Admittance vs.
Drain Current
10
5 Tc = –25 °C
2 75 °C
1
25 °C
0.5
0.2 V DS = –10 V
Pulse Test
0.1
–0.1 –0.2 –0.5 –1 –2 –5 –10
Drain Current I D (A)
4

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2SJ517
Body–Drain Diode Reverse
Recovery Time
500
200
100
50
20
10 di / dt = 50 A / µs
VGS = 0, Ta = 25 °C
5
–0.1 –0.2 –0.5 –1 –2 –5 –10
Reverse Drain Current I DR (A)
1000
500
200
100
50
Typical Capacitance vs.
Drain to Source Voltage
Ciss
Coss
Crss
20 VGS = 0
f = 1 MHz
10
0 –4
–8
–12 –16
–20
Drain to Source Voltage V DS (V)
Dynamic Input Characteristics
0
V DD = –5 V
–10 V
–10
VDS
–20
V DD = –5 V
–30 –10 V
VGS
–40
0
–4
–8
–12
–16
–50
0
4 8 12 16
Gate Charge Qg (nc)
–20
20
Switching Characteristics
500
200
t d(off)
100
tf
50 t r
20 t d(on)
10
5
–0.1 –0.2
VGS = –4 V, V DD = –10 V
duty < 1 %
–0.5 –1 –2 –5 –10
Drain Current I D (A)
5