4069UB.pdf 데이터시트 (총 6 페이지) - 파일 다운로드 4069UB 데이타시트 다운로드

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October 1987
Revised January 1999
CD4069UBC
Inverter Circuits
General Description
The CD4069UB consists of six inverter circuits and is man-
ufactured using complementary MOS (CMOS) to achieve
wide power supply operating range, low power consump-
tion, high noise immunity, and symmetric controlled rise
and fall times.
This device is intended for all general purpose inverter
applications where the special characteristics of the
MM74C901, MM74C907, and CD4049A Hex Inverter/Buff-
ers are not required. In those applications requiring larger
noise immunity the MM74C14 or MM74C914 Hex Schmitt
Trigger is suggested.
All inputs are protected from damage due to static dis-
charge by diode clamps to VDD and VSS.
Features
s Wide supply voltage range: 3.0V to 15V
s High noise immunity: 0.45 VDD typ.
s Low power TTL compatibility: Fan out of 2 driving 74L
or 1 driving 74LS
s Equivalent to MM74C04
Ordering Code:
Order Number Package Number
Package Description
CD4069UBCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
CD4069UBCSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4069UBCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.
Connection Diagram
Schematic Diagram
Pin Assignments for SOIC and DIP
© 1999 Fairchild Semiconductor Corporation DS005975.prf
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Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
0.5V to +18 VDC
0.5V to VDD +0.5 VDC
65°C to +150°C
700 mW
500 mW
260°C
DC Supply Voltage (VDD)
3V to 15VDC
Input Voltage (VIN)
0V to VDD VDC
Operating Temperature Range (TA)
40°C to +85°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of “Recom-
mended Operating Conditions” and Electrical Characteristics table provide
conditions for actual device operation.
Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 3)
Symbol
Parameter
Conditions
IDD Quiescent Device Current
VDD = 5V,
VIN = VDD or VSS
VDD = 10V,
VIN = VDD or VSS
VDD = 15V,
VIN = VDD or VSS
VOL LOW Level Output Voltage
|IO| < 1 µA
VDD = 5V
VDD = 10V
VDD = 15V
VOH HIGH Level Output Voltage
|IO| < 1 µA
VDD = 5V
VDD = 10V
VDD = 15V
VIL LOW Level Input Voltage
|IO| < 1 µA
VDD = 5V, VO = 4.5V
VDD = 10V, VO = 9V
VDD = 15V, VO = 13.5V
VIH HIGH Level Input Voltage
|IO| < 1 µA
VDD = 5V, VO = 0.5V
VDD = 10V, VO = 1V
VDD = 15V, VO = 1.5V
IOL LOW Level Output Current
VDD = 5V, VO = 0.4V
(Note 4)
VDD = 10V, VO = 0.5V
VDD = 15V, VO = 1.5V
IOH HIGH Level Output Current
VDD = 5V, VO = 4.6V
(Note 4)
VDD = 10V, VO = 9.5V
VDD = 15V, VO = 13.5V
IIN Input Current
VDD = 15V, VIN = 0V
VDD = 15V, VIN = 15V
Note 3: VSS = 0V unless otherwise specified.
Note 4: IOH and IOL are tested one output at a time.
40°C
Min Max
1.0
+25°C
Min Typ Max
1.0
+85°C
Min Max
7.5
Units
µA
2.0 2.0 15 µA
4.0 4.0 30 µA
0.05
0.05
0.05
0 0.05
0 0.05
0 0.05
0.05
0.05
0.05
V
V
V
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
V
V
V
1.0 1.0 1.0 V
2.0 2.0 2.0 V
3.0 3.0 3.0 V
4.0
8.0
12.0
0.52
1.3
3.6
0.52
1.3
3.6
0.30
0.30
4.0
8.0
12.0
0.44
1.1
3.0
0.44
1.1
3.0
0.88
2.25
8.8
0.88
2.25
8.8
105
105
0.30
0.30
4.0
8.0
12.0
0.36
0.9
2.4
0.36
0.9
2.4
1.0
1.0
V
V
V
mA
mA
mA
mA
mA
mA
µA
µA
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AC Electrical Characteristics (Note 5)
TA = 25°C, CL = 50 pF, RL = 200 k, tr and tf 20 ns, unless otherwise specified
Symbol
Parameter
Conditions
Min Typ Max Units
tPHLor tPLH
tTHL or tTLH
Propagation Delay Time from
Input to Output
Transition Time
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
50 90
30 60
25 50
80 150
50 100
40 80
ns
ns
ns
ns
ns
ns
CIN
Average Input Capacitance
Any Gate
6 15 pF
CPD
Power Dissipation Capacitance
Any Gate (Note 6)
12 pF
Note 5: AC Parameters are guaranteed by DC correlated testing.
Note 6: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note—
AN-90.
AC Test Circuits and Switching Time Waveforms
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