LV32.pdf 데이터시트 (총 6 페이지) - 파일 다운로드 LV32 데이타시트 다운로드

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TECHNICAL DATA
SL74LV32
Quad 2-Input OR Gate
The SL74LV32 is low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT32A.
The SL74LV32 provides the 2-input AND function.
Optimized for Low Voltage applications: 1.2 to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Low Input Current
ORDERING INFORMATION
SL74LV32N Plastic
SL74LV32D SOIC
IZ74LV32
Chip
TA = -40° ÷ 125° C for all packages
LOGIC DIAGRAM
A1
Y1
B1
A2
Y2
B2
A3
Y3
B3
A4
Y4
B4
PIN 14 =VCC
PIN 7 = GND
SLS System Logic
Semiconductor
PIN ASSIGNMENT
FUNCTION TABLE
Input
AB
LL
LH
HL
HH
H - high level
L - low level
Output
Y = A*B
L
H
H
H
1

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SL74LV32
MAXIMUM RATINGS*
Symbol
Parameter
Value
VCC
IIK *1
IOK *2
IO *3
ICC
IGND
PD
Tstg
TL
DC supply voltage (Referenced to GND)
DC input diode current
DC output diode current
DC output source or sink current
-bus driver outputs
DC VCC current for types with
- bus driver outputs
DC GND current for types with
- bus driver outputs
Power dissipation per package, plastic DIP+
SOIC package+
Storage temperature
Lead temperature, 1.5 mm from Case for 10 seconds
(Plastic DIP ), 0.3 mm (SOIC Package)
-0.5 ÷ +5.0
±20
±50
±25
±50
±50
750
500
-65 ÷ +150
260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C
SOIC Package: : - 8 mW/°C from 70° to 125°C
*1: VI < -0.5V or VI > VCC+0.5V
*2: Vo < -0.5V or Vo > VCC+0.5V
*3: -0.5V < Vo < VCC+0.5V
Unit
V
mA
mA
mA
mA
mA
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
VIN, VOUT
TA
tr, tf
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time
VCC =1.2 V
VCC =2.0 V
VCC =3.0 V
VCC =3.6 V
Min Max Unit
1.2 3.6
V
0 VCC
-40 +125
V
°C
0 1000 ns
0 700
0 500
0 400
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or
VOUT)VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
SLS System Logic
Semiconductor
2

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SL74LV32
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
VIH
VIL
VOH
VOL
IIL
I
IÑÑ
Parameter
Test Conditions VCC,
V
Guaranteed Limit
25°C
-40°C ÷ 85°C -40°C ÷
125°C
min max min max min max
High-Level Input
Voltage
Low -Level Input
Voltage
High-Level Output VI = VIL or VIH
Voltage
IO = -50 µÀ
VI = VIL or VIH
IO = -6.0 mÀ
Low-Level Output VI = VIL or VIH
Voltage
IO = 50 µÀ
Low-Level Input
Leakage Current
VI = VIL or VIH
IO = 6.0 mÀ
VI = 0 V
High-Level Input VI = VCC
Leakage Current
Quiescent Supply VI = 0 Â or VCC
Current
(per Package)
IO = 0 µÀ
1.2 0.9 - 0.9 - 0.9 -
2.0 1.4 - 1.4 - 1.4 -
3.0 2.1 - 2.1 - 2.1 -
3.6 2.5 - 2.5 - 2.5 -
1.2 - 0.3 - 0.3 - 0.3
2.0 - 0.6 - 0.6 - 0.6
3.0 - 0.9 - 0.9 - 0.9
3.6 - 1.1 - 1.1 - 1.1
1.2 1.1 - 1.0 - 1.0 -
2.0 1.92 - 1.9 - 1.9 -
3.0 2.92 - 2.9 - 2.9 -
3.6 3.52 - 3.5 - 3.5 -
3.0 2.48 - 2.34 - 2.20 -
1.2 - 0.09 - 0.1 - 0.1
2.0 - 0.09 - 0.1 - 0.1
3.0 - 0.09 - 0.1 - 0.1
3.6 - 0.09 - 0.1 - 0.1
3.0 - 0.33 - 0.4 - 0.5
3.6 - -0.1 - -1.0 - -1.0
3.6 - 0.1 - 1.0 - 1.0
3.6 - 2.0 - 20 - 40
Unit
V
V
V
V
V
V
µA
µA
µA
SLS System Logic
Semiconductor
3