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LZ9FD34
LZ9FD34
DESCRIPTION
The LZ9FD34 is a CMOS single-chip driver IC which
generates timing pulses for driving 270 k/320 k/
410 k/470 k-pixel B/W CCD area sensors, syn-
chronous pulses for TV signals and processing for
video signals.
FEATURES
• Designed for B/W CCD area sensors with 270 k/
320 k/410 k/470 k-pixel
• Switchable between EIA and CCIR modes
• Electronic shutter and EE control are possible
• Maximum shutter speed is 1/100 000 s
• Flicker-less function
• Non-interlace mode is possible
• External synchronization is possible
• Single +5 V power supply
• Field accumulation mode and frame accumu-
lation mode are possible
• Package :
48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch
Single-chip Driver IC for 270 k/320 k/
410 k/470 k-pixel B/W CCDs
PIN CONNECTIONS
48-PIN QFP
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
TST1 1
TST2 2
VRI 3
TVMD 4
CSYN 5
VDD 6
GND 7
CBLK 8
HD 9
VD 10
HBLK 11
TST3 12
36 OFDX
35 VH3X
34 VH1X
33 V4X
32 V3X
31 GND
30 VDD
29 V2X
28 V1X
27 TST7
26 CCD
25 TST6
13 14 15 16 17 18 19 20 21 22 23 24
(QFP048-P-0707)
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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BLOCK DIAGRAM
LZ9FD34
ITCH 37
EEST 38
WIND 39
FR 40
VDD 41
FH2 42
GND 43
FH1 44
VDD 45
OSCI 46
OSCO 47
NINT 48
36 35 34 33 32 31 30 29 28 27 26 25
SHUTTER
SHUTTER
MIX
SPEED
UP/DOWN
CONTROL
CONTROL
MIX 1/2
MODE SELECT
MODE SELECT
1/4
H COUNTER 2
DECODER
OSC
RESET
DECODER
1/2
H COUNTER 1
V COUNTER
1 2 3 4 5 6 7 8 9 10 11 12
24 FS
23 FCDS
22 EENR
21 EEUD
20 EEMD
19 FLMD
18 VDD
17 ACLX
16 GND
15 TST5
14 TST4
13 BCP
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LZ9FD34
PIN DESCRIPTION
PIN NO. SYMBOL I/O POLARITY
PIN NAME
1 TST1
ICD – Test pin 1
2 TST2
ICD – Test pin 2
3 VRI
ICSU – Vertical reset input
4 TVMD
5 CSYN
6 VDD
7 GND
8 CBLK
9 HD
10 VD
11 HBLK
12 TST3
13 BCP
14 TST4
15 TST5
16 GND
TV mode selection
ICU –
input
Composite
O synchronizing pulse
output
– – Power supply
– – Ground
Composite blanking
O
pulse output
Horizontal drive
O
pulse output
Vertical drive pulse
O
output
Horizontal blanking
O
pulse output
ICD – Test pin 3
Optical black clamp
O
pulse output
ICD – Test pin 4
ICD – Test pin 5
– – Ground
17 ACLX
ICU – All clear input
18 VDD
19 FLMD
– – Power supply
Electronic exposure
ICU – and WIND pulse
control input 1
20 EEMD
Electronic exposure
ICU – and WIND pulse
control input 2
DESCRIPTION
A test pin. Set open or to L level in the normal mode.
A test pin. Set open or to L level in the normal mode.
An input pin for resetting internal vertical counter.
The input pulse is VSYNC. (negative polarity)
An input pin to select TV standards.
L level
: EIA mode
H level or open : CCIR mode
An output pin of composite synchronous signal pulse.
Supply of +5 V power.
A grounding pin.
An output pin of composite blanking pulse.
The pulse occurs at the start of every line.
The pulse occurs at the start of every field.
A pulse that corresponds to the cease period of the
horizontal transfer pulse.
A test pin. Set open or to L level in the normal mode.
A pulse to clamp the optical black signal. This pulse
stays low during the absence of effective pixels within
the vertical blanking.
A test pin. Set open or to L level in the normal mode.
A test pin. Set open or to L level in the normal mode.
A grounding pin.
An input pin for resetting all internal circuits at power on.
Connect VDD through the diode and through the
capacitor.
Supply of +5 V power.
An input pin to control electronic exposure mode, flicker-
less mode and WIND (pin 39) pulse output.
FLMD EEMD Electronic Shutter mode WIND
L L EIA : 1/60 s, CCIR : 1/50 s WIND1
H L EIA : 1/100 s, CCIR : 1/120 s WIND1
L H Electronic exposure mode WIND1
H H Electronic exposure mode WIND2
WIND1 : Vertical pulse
WIND2 : Composite pulse (vertical and horizontal)
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LZ9FD34
PIN NO. SYMBOL
21 EEUD
22 EENR
I/O POLARITY
PIN NAME
DESCRIPTION
Electronic exposure An input pin to control electronic exposure.
IC –
control input 1
EEUD EENR
Shutter Speed
HL
up
Electronic exposure
IC –
control input 2
HH
LH
control stopped
down
23 FCDS
24 FS
25 TST6
26 CCD
27 TST7
28 V1X
29 V2X
30 VDD
31 GND
32 V3X
33 V4X
34 VH1X
35 VH3X
36 OFDX
37 ITCH
38 EEST
O4MA2
CDS pulse output 1 A pulse to clamp the feed-through level from CCD.
O4MA2
CDS pulse output 2 A pulse to sample-hold the signal from CCD.
ICD – Test pin 6
A test pin. Set open or to L level in the normal mode.
An input pin to select sensor type.
ICU – CCD selection input H level or open : 410 k, 470 k pixel CCD
L level
: 270 k, 320 k pixel CCD
ICD – Test pin 7
A test pin. Set open or to L level in the normal mode.
Vertical transfer
A vertical transfer pulse for CCD.
O
pulse output 1
Connect to V1AX pin of vertical driver IC.
Vertical transfer
A vertical transfer pulse for CCD.
O
pulse output 2
Connect to V2AX pin of vertical driver IC.
– – Power supply
Supply of +5 V power.
– – Ground
A grounding pin.
Vertical transfer
A vertical transfer pulse for CCD.
O
pulse output 3
Connect to V3AX pin of vertical driver IC.
Vertical transfer
A vertical transfer pulse for CCD.
O
pulse output 4
Connect to V4AX pin of vertical driver IC.
A pulse that transfers the charge of the photo-diode to
Readout pulse
O the vertical shift register. Connect to VH1AX pin or VH1BX
output
pin of vertical driver IC.
A pulse that transfers the charge of the photo-diode to
Readout pulse
O the vertical shift register. Connect to VH3AX pin or VH3BX
output
pin of the vertical driver IC.
A pulse that sweeps the charge of the photo-diode for
the electronic shutter. Connect to OFD pin of CCD
O OFD pulse output
through the vertical driver IC and DC offset circuit.
Held at H level at normal mode.
An input pin to select accumulation mode.
Accumulation mode
ICU –
H level or open : Field accumulation mode
selection input
L level
: Frame accumulation mode
An input pin to control electronic exposure using EEUD
Electronic exposure (pin 21) and EENR (pin 22).
ICU –
control input 3
H level or open : Electronic exposure is operated.
L level
: Electronic exposure is stopped.
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LZ9FD34
PIN NO. SYMBOL I/O POLARITY
PIN NAME
DESCRIPTION
An output pin for window pulse.
EEMD FLMD
WIND
LL
L H WIND1 (vertical pulse)
ON H L
H H WIND2 (composite pulse)
39 WIND
( )N-ch
Open
Drain
Window pulse output WIND1 : When connected to EEST (pin 38), the
operation of electronic exposure can be
stopped at the upper side of monitor.
WIND2 : A pulse that picks out the center of CCD output.
At this time, set H level or open at EEST (pin
38). As the output circuit of WIND is N-ch open
drain, connect to VDD with R (≥ 47 k$).
40 FR
O4MA3
A pulse to reset the charge of output circuit.
Reset pulse output
Connect to ØR pin of CCD through the DC offset circuit.
41 VDD
– – Power supply
Supply of +5 V power.
42 FH2
O4MA3
Horizontal transfer
pulse output 2
A pulse to drive horizontal CCD shift register.
Connect to ØH2 pin of CCD.
43 GND
– – Ground
A grounding pin.
44 FH1
O4MA3
Horizontal transfer
pulse output 1
A pulse to drive horizontal CCD shift register.
Connect to ØH1 pin of CCD.
45 VDD
– – Power supply
Supply of +5 V power.
An input pin for reference clock oscillation.
Connect to OSCO (pin 47) with R.
The frequencies are as follows :
TVMD CCD
Frequency
46 OSCI
OSCI – Clock input
LL
19.0699 MHz (1 212 fH)
LH
28.6364 MHz (1 820 fH)
HL
19.3125 MHz (1 236 fH)
HH
28.3750 MHz (1 816 fH)
fH = Horizontal frequency
47 OSCO OSC3M – Clock output
An output pin for reference clock oscillation.
The output is the inverse of OSCI (pin 46).
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