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1 To : ED1
ISPEC No.
ISSUE:
Sep. 2 1999
SPECIFICATIONS.
Product Type
LZ 9 G Series 1 6 0 0 Gates Gate Array
Model No.
LZ9GFl6
-X This specifications contains 22 pages including the cover and appendix.
If you have any objections, please contact us before issuing purchasing order.
CUSTOMEARCSCEPTANCE
DATE: __-__---
BY: _- --.-
PRESENTED
Dept.General Manager
REVIEWEDBY:
PREPAREDBY:
Engineering Dept. 2
Display Device
System LSI Development Center
Integrated Circuits Group
SHARi CORPORATION -

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LZ9GF16
@Handle this document carefully for it contains material protected by international copyright law.
Any reproduction, full or in part, of this material is prohibited without the express written
permission of the company.
@Whenusing the products covered herein, please observe the conditions written herein and the precautions
outlined in the following paragraphs. In no event shall the companybe liable for any damages
resulting from failure to strictly adhere to these conditions and precautions.
( 1 ) The products covered herein are designed and manufactured for the following application areas.
Whenusing the products covered herein for the equipment listed in Paragraph (2 1, even for
the following application areas, be sure to observe the precautions given in Paragraph ( 2 ).
Never use the products for the equipment listed in Paragraph ( 3 ).
*Office electronics
. Instrumentation and measuring equipment
l Machine tools
* Audiovisual equipment
l Homeappliances
* Communication equipment other than for trunk lines
( 2 > Those contemplating using the products covered herein for the following equipment which demands
high reliability, should first contact a sales representative of the company and then accept
responsibility for incorporating into the design fail-safe operation, redundancy, and other
appropriate measures for ensuring reliability and safety of the equipment and the overall system.
. Control and safety devices for airplanes, trains, automobiles, and other transportation equipment
. Mainframe computers
. Traffic control systems
. Gas leak detectors and automatic cutoff devices
0Rescue and security equipment
0Other safety devices and safety equipment, etc.
( 3 ) Do not use the products covered herein for the following equipment which demands extremely
high performance in terms of functionality, reliability, or accuracy.
*Aerospace equipment
* Communications equipment for trunk lines
. ControI equipment for the nuclear power industry
*Medical equipment related to life support, etc.
( 4 )Please direct all queries and comments regarding the interpretation of the above three Paragraphs
to a sales representative of the company.
l Please direct all queries regarding the products covered herein to a sales representative of the
company.

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LZ9GFi6
CONTENTS
1. Introduction
2. Feature
3. Pin Assignments
4. Explanation of Input / Output signal
5. Absolute Maximum Ratings
6. Electrical Specifications
7. Condition for signal circuit
8. Illustration of control circuit
9. Input / Output signal timing chart for above cases
10. OutIine dimension
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Page
02
. . . . 92
. . . . l3
. . . . l 4-5
. . . . -6
. . . . -6
. . . . l 7-8
. . . . l 9-11
. . . . ’ 12-19
. . . . l 20
1

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* SHARI=
LZ9GF16
.
2
1. Introduction
This data sheet is to introduce the specification of LZ9GF16,
timing control IC for TFT-LCDmodule.
The functions and the uses
Timing control IC for 5” size and 5.6” size TFTlLCDmodule
Horizontal frequency driver(NTSC:600 divided frequency /PAL:604 divided frequency) and
phase comparator circuit for the PLL circuit are built in.
By adding voltage Controlled Oscillator(VC0) and LowPass Filter(LPF) to this IC to makethe
PLL circuit, following signals synchronized with input composite sync.
Signal(SYN1) and vertical sync. Signal(VIN) conforming to NTSCor PALare generated.
1) Driving signal for source driver
2) Control signal for source driver
3) Driving signal for gate driver
4) Control signal for gate driver
5) Control signal for gate driver power supply making
6) Polarity alternating signal for commonelectrode driving
7) Polarity alternating signal for video signal
8) Control signal for the backlight PWMbrightness control
signal
: CLD, SPD
: CTR,DIS
: CLS, SPS
: LOW0
: GPS
: FBPT
: FRPV
: CHK
Illustration of control circuit
Input/Output signal timing chart for above cases
: Seefig. l-a - l-c
: Seefig. 2-a - 2-j
2. Feature
Process
: CMOS
Wafer substrate
: P-type silicon substrate
Package
(pin & type) : 48QFP(0.75mmpin pitch)
(material) : Plastics
Operating Temperature
: -30°C - +85”C
Propagation delay time
: 0. Snslgate
(Condition : Z-input NAND,Fanout=X, wire length=2mm,
supply voltage=5V, Operating temperature Topr=25”C)
*REMARK
Not designed or rated as radiation hardened.
Youcannot rewrite the program.

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3. Pin Assignment
LZ9GF16
3
ICU
ICS
01M
02M
ORZ
ORZx2
TOlM
IOCUBM
IOCURZ
OSCB
osco
hD
GND
: Input buffer CMOSlevel with PULLUPresistance R=250k8
: Schmitt-trigger Input buffer CMOSlevel
: Output buffer I,=O.BmA
: Output buffer 1,,=1.61nA
: Slew rate controlled Output buffer I,,=BOfiA
: Slew rate controlled Output buffer 1~,=16OflA.
* ORZx2 buffer is connected two ORZbuffer in parallel.
: Tri-state Output buffer 1,,,=0.8mA
: Bidirecional buffer CMOSlevel with PULLUPresistance R=250kQ, 1,~=1.6mA
: Slew rate controlled Bidirecional buffer CMOSlevel
with PULLUPresistance R=250kQ, IoL=80pA
: Oscillator Bidirecional buffer with oscillation stop control 10,=32.mA
: Oscillator Output buffer Io,=l.6mA
: Power supply pin
: Earth pin