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March 2000
PRELIMINARY
FDS6982S
Dual Notebook Power Supply N-Channel PowerTrenchSyncFet
General Description
The FDS6982S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6982S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
Features
Q2: Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
8.6A, 30V
RDS(on) = 0.016@ VGS = 10V
RDS(on) = 0.021@ VGS = 4.5V
Q1: Optimized for low switching losses
Low Gate Charge ( 8.5 nC typical)
6.3A, 30V
RDS(on) = 0.028@ VGS = 10V
RDS(on) = 0.035@ VGS = 4.5V
D1
D1
D2
D2
SO-8
G1
S1
G2
S2
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6982S
FDS6982S
13”
5
6 Q1
7
Q2
8
4
3
2
1
Q2 Q1
30 30
±20 ±20
8.6 6.3
30 20
2
1.6
1
0.9
-55 to +150
Units
V
V
A
W
°C
78 °C/W
40 °C/W
Tape width
12mm
Quantity
2500 units
1999 Fairchild Semiconductor Corporation
FDS6982S Rev B(W)

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Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Off Characteristics
BVDSS
Drain-Source Breakdown
Voltage
BVDSS
TJ
IDSS
Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain
Current
IGSSF
Gate-Body Leakage, Forward
IGSSR
Gate-Body Leakage, Reverse
VGS = 0 V, ID = 1 mA
VGS = 0 V, ID = 250 uA
ID = 1 mA, Referenced to 25°C
ID = 250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
ID(on)
On-State Drain Current
VDS = VGS, ID = 1 mA
VDS = VGS, ID = 250 µA
ID = 1 mA, Referenced to 25°C
ID = 250 µA, Referenced to 25°C
VGS = 10 V, ID = 8.6 A
VGS = 10 V, ID = 8.6 A, TJ = 125°C
VGS = 4.5 V, ID = 7.5 A
VGS = 10 V, ID = 6.3 A
VGS = 10 V, ID = 6.3 A, TJ = 125°C
VGS = 4.5 V, ID = 5.6 A
VGS = 10 V, VDS = 5 V
gFS Forward Transconductance
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
VDS = 5 V, ID = 8.6 A
VDS = 5 V, ID = 6.3 A
VDS = 10 V, VGS = 0 V,
f = 1.0 MHz
Crss Reverse Transfer Capacitance
Type Min Typ Max Units
Q2 30
Q1 30
V
Q2 20 mV/°C
Q1 26
Q2 1000 µA
Q1 1
All 100 nA
All -100 nA
Q2 1
Q1 1
3V
3
Q2 -3.5 mV/°C
Q1 -5
Q2 0.013 0.016
0.020 0.027
0.017 0.021
Q1 0.021 0.028
0.038 0.047
0.028 0.035
Q2 30
Q1 20
A
Q2 38
Q1 18
S
Q2 2040
Q1 815
Q2 615
Q1 186
Q2 216
Q1 66
pF
pF
pF
FDS6982S Rev B (W)

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Electrical Characteristics (continued)
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Switching Characteristics
td(on) Turn-On Delay Time
tr Turn-On Rise Time
(Note 2)
VDD = 15 V, ID = 1 A,
VGS = 10V, RGEN = 6
td(off) Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Q2
VDS = 15 V, ID = 11.5 A, VGS = 5 V
Q1
VDS = 15 V, ID = 6.3 A,VGS = 5 V
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
DrainSource Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
tRR
Reverse Recovery Time
IF = 11.5A,
QRR Reverse Recovery Charge diF/dt = 300 A/µs
(Note 3)
VSD Drain-Source Diode Forward VGS = 0 V, IS = 3 A
Voltage
VGS = 0 V, IS = 6 A
VGS = 0 V, IS = 1.3 A
(Note 2)
(Note 2)
(Note 2)
Q2
Q1
Q2
Q2
Q2
Q1
10 18
10 18
10 18
14 25
34 55
21 34
14 23
7 14
17.5 26
8.5 12
6.3
2.4
5.4
3.1
ns
ns
ns
ns
nC
nC
nC
20
19.7
0.42
0.56
0.70
3.0
1.3
.7
1.2
A
ns
nC
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°/W when
mounted on a
0.5 in2 pad of 2 oz
copper
b) 125°/W when
mounted on a .02 in2
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. See “SyncFET Schottky body diode characteristics” below.
c) 135°/W when mounted on a
minimum pad.
FDS6982S Rev B (W)

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Typical Characteristics: Q2
50
VGS = 10V
6.0V
40 4.5V
5.0V
4.0V
30
3.5V
20
10
0
0
3.0V
0.5 1 1.5 2
VDS, DRAIN-SOURCE VOLTAGE (V)
2.5
Figure 1. On-Region Characteristics.
2
1.8
ID = 11.5A
VGS = 10V
1.6
1.4
1.2
1
0.8
0.6
0.4
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation with
Temperature.
50
VDS = 5V
40
30
20
TA = -55oC
25oC
100o
10
0
12345
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
2.5
2
VGS = 3.0V
1.5 3.5V
4.0V
4.5V
6.0V
1 10V
0.5
0
10 20 30 40
ID, DRAIN CURRENT (A)
50
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.04
0.035
0.03
0.025
0.02
0.015
0.01
2
ID = 11.5 A
TA = 125oC
TA = 25oC
468
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
VGS = 0V
1
TA = 100oC
25oC
-55oC
0.1
0.01
0
0.2 0.4 0.6
VSD, BODY DIODE FORWARD VOLTAGE (V)
0.8
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6982S Rev B (W)

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Typical Characteristics: Q2
10
ID = 11.5A
8
6
VDS = 5V
10V
15V
4
2
0
0 10 20 30 40
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
RDS(ON) LIMIT
10
1
100µs
1ms
10ms
100ms
1s
10s
VGS = 10V
0.1
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
DC
0.01
0.1
1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
3000
2500
2000
1500
1000
500
0
0
CISS
f = 1MHz
VGS = 0 V
COSS
CRSS
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
40
30
20
10
0
0.001
0.01
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
0.1 1
10
t1, TIME (sec)
100 1000
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS6982S Rev B (W)