FQAF34N20L.pdf 데이터시트 (총 8 페이지) - 파일 다운로드 FQAF34N20L 데이타시트 다운로드

No Preview Available !

FQAF34N20L
200V LOGIC N-Channel MOSFET
June 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supply, motor control.
Features
• 23A, 200V, RDS(on) = 0.075@VGS = 10 V
• Low gate charge ( typical 55 nC)
• Low Crss ( typical 52 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• Low level gate drive requirement allowing direct
opration from logic drivers
G DS
TO-3PF
FQAF Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
FQAF34N20L
200
23
14.5
92
± 20
640
23
9.5
5.5
95
0.76
-55 to +150
300
Typ Max
-- 1.32
-- 40
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A, June 2000

No Preview Available !

Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
VGS = 0 V, ID = 250 µA
200 --
ID = 250 µA, Referenced to 25°C -- 0.16
IDSS
Zero Gate Voltage Drain Current
VDS = 200 V, VGS = 0 V
VDS = 160 V, TC = 125°C
-- --
-- --
IGSSF
IGSSR
Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V
Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V
-- --
-- --
--
--
1
10
100
-100
V
V/°C
µA
µA
nA
nA
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on) Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 11.5 A
VGS = 5 V, ID = 11.5 A
VDS = 30 V, ID = 11.5 A
(Note 4)
1.0 --
2.0
--
0.057 0.075
0.060 0.080
-- 38
--
V
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 3000 3900
-- 400 520
-- 52
67
pF
pF
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 100 V, ID = 34 A,
RG = 25
(Note 4, 5)
VDS = 160 V, ID = 34 A,
VGS = 5 V
(Note 4, 5)
--
--
--
--
--
--
--
45 100
520 1050
170 350
370 750
55 72
9.9 --
27 --
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 23
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- 92
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 23 A
-- -- 1.5
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 34 A,
dIF / dt = 100 A/µs
-- 205
(Note 4)
--
1.1
--
--
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.8mH, IAS = 23A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 34A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
A
A
V
ns
µC
©2000 Fairchild Semiconductor International
Rev. A, June 2000

No Preview Available !

Typical Characteristics
V
GS
Top : 10.0 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
101
100
10-1
Notes :
1. 250μs Pulse Test
2. T = 25
C
100
V , Drain-Source Voltage [V]
DS
101
Figure 1. On-Region Characteristics
0.25
0.20
V = 5V
GS
0.15
V = 10V
GS
0.10
0.05
0.00
0
Note : T = 25
J
30 60 90
ID, Drain Current [A]
120
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
7000
6300
5600
4900
4200
3500
2800
2100
1400
700
0
10-1
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
C
iss
C
oss
C
rss
Notes :
1. VGS = 0 V
2. f = 1 MHz
100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
101
150
100
25
10-1
0
-55
Notes :
1. VDS = 30V
2. 250μs Pulse Test
2468
V , Gate-Source Voltage [V]
GS
10
Figure 2. Transfer Characteristics
101
100
10-1
0.2
15025
Notes :
1. V = 0V
GS
2. 250μs Pulse Test
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD, Source-Drain voltage [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10
V = 40V
DS
V = 100V
8 DS
VDS = 160V
6
4
2
Note : ID = 34 A
0
0 20 40 60 80 100 120
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, June 2000

No Preview Available !

Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
Notes :
1. VGS = 0 V
2. ID = 250 μA
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
is Limited by R DS(on)
102
100 µs
1 ms
101 10 ms
DC
100
10-1
100
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = 10 V
2. ID = 17 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
25
20
15
10
5
0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
100
D = 0 .5
0 .2
1 0 -1
0 .1
0 .0 5
0 .0 2
0 .0 1
s in g le p u ls e
N o te s :
1 . Z θ JC(t) = 1 .3 2 /W M a x.
2 . D u ty F a c to r, D = t /t
12
3 . T JM - T C = P D M * Z θ JC(t)
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, June 2000

No Preview Available !

Gate Charge Test Circuit & Waveform
50KΩ
Same Type
as DUT
12V 200nF
300nF
VGS
5V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
VGS
RG
RL
VDD
VDS
90%
5V
DUT
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
10V
tp
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS
=
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
©2000 Fairchild Semiconductor International
Rev. A, June 2000