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FQB13N06 / FQI13N06
60V N-Channel MOSFET
May 2001
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as DC/DC
converters, high efficiency switching for power
management in portable and battery operated products.
Features
• 13A, 60V, RDS(on) = 0.135@VGS = 10 V
• Low gate charge ( typical 5.8 nC)
• Low Crss ( typical 15 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
D
!
"
!"
G!
"
"
!
S
FQB13N06 / FQI13N06
60
13
9.2
52
± 25
85
13
4.5
7.0
3.75
45
0.3
-55 to +175
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ Max Units
-- 3.35 °C/W
-- 40 °C/W
-- 62.5 °C/W
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001

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Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to
25°C
VDS = 60 V, VGS = 0 V
VDS = 48 V, TC = 150°C
VGS = 25 V, VDS = 0 V
VGS = -25 V, VDS = 0 V
60 --
-- 0.06
-- --
-- --
-- --
-- --
--
--
1
10
100
-100
V
V/°C
µA
µA
nA
nA
On Characteristics
VGS(th)
RDS(on)
gFS
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
VDS = VGS, ID = 250 µA
2.0 --
4.0
VGS = 10 V, ID = 6.5 A
-- 0.105 0.135
VDS = 25 V, ID = 6.5 A (Note 4) --
5.1
--
V
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 240 310
-- 90 120
-- 15
20
pF
pF
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
tf
Qg
Qgs
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 30 V, ID = 6.5 A,
RG = 25
-- 5 20 ns
-- 25 60 ns
-- 8 25 ns
(Note 4, 5) --
15
40
ns
VDS = 48 V, ID = 13 A,
VGS = 10 V
(Note 4, 5)
--
--
--
5.8
2.0
2.5
7.5
--
--
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 13 A
ISM Maximum Pulsed Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 13 A
-- -- 52 A
-- -- 1.5 V
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 13 A,
-- 39 -- ns
dIF / dt = 100 A/µs
(Note 4) --
40
--
nC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 590µH, IAS = 13A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 13A, di/dt 300A/us, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001

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Typical Characteristics
VGS
Top : 15.0 V
10.0 V
8.0 V
101 7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
10-1
10-1
Notes :
1. 250μ s Pulse Test
2. TC = 25
100
V , Drain-Source Voltage [V]
DS
101
Figure 1. On-Region Characteristics
500
400 V = 10V
GS
300
V = 20V
GS
200
100
0
0
Note : T = 25
J
10 20 30
ID, Drain Current [A]
40
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
600
500
C = C + C (C = shorted)
iss gs gd ds
C =C +C
oss ds gd
C =C
rss gd
400
C
iss
C
oss
300
Notes :
1. V = 0 V
GS
2. f = 1 MHz
200
Crss
100
0
10-1 100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2001 Fairchild Semiconductor Corporation
101
100
10-1
2
175
25
-55
Notes :
1. VDS = 25V
2. 250μ s Pulse Test
468
VGS, Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
101
100
0.2
175
25
Notes :
1. V = 0V
GS
2. 250μ s Pulse Test
0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD, Source-Drain voltage [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10
V = 30V
DS
V = 48V
DS
8
6
4
2
Note : ID = 13 A
0
01234567
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A1. May 2001

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
Notes :
1. VGS = 0 V
2. ID = 250 μ A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
102 is Limited by R DS(on)
100 µs
1 ms
101 10 ms
DC
100
10-1
10-1
Notes :
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
100 101
V , Drain-Source Voltage [V]
DS
102
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = 10 V
2. ID = 6.5 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
15
12
9
6
3
0
25 50 75 100 125 150 175
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D = 0.5
0 .2
0 .1
0 .05
0 .02
0 .01
sin g le p u ls e
N o tes :
1.
Zθ
(t)
JC
=
3 .3 5
/W
M ax.
2 . D uty F acto r, D = t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Zθ
(t)
JC
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
101
Figure 11. Transient Thermal Response Curve
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001

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Gate Charge Test Circuit & Waveform
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
10V
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
10V
tp
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS
=
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001