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FQB1P50 / FQI1P50
500V P-Channel MOSFET
December 2000
QFETTM
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for electronic lamp ballasts based on the
complementary half bridge topology.
Features
• -1.5A, -500V, RDS(on) = 10.5@VGS = -10 V
• Low gate charge ( typical 11 nC)
• Low Crss ( typical 6.0 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
RθJC
RθJA
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
G!
S
!
▶▲
!
D
FQB1P50 / FQI1P50
-500
-1.5
-0.95
-6.0
± 30
110
-1.5
6.3
-4.5
3.13
63
0.51
-55 to +150
300
Typ Max
-- 1.98
-- 40
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A2, December 2000

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Elerical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = -250 µA
ID = -250 µA, Referenced to 25°C
VDS = -500 V, VGS = 0 V
VDS = -400 V, TC = 125°C
VGS = -30 V, VDS = 0 V
VGS = 30 V, VDS = 0 V
-400
--
--
--
--
--
--
-
--
--
--
--
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = -250 µA
-3.0 --
VGS = -10 V, ID = -0.75 A
-- 8.0
VDS = -50 V, ID = -0.75 A (Note 4) -- 1.26
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
-- 270
-- 40
-- 6.0
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = -250 V, ID = -1.5 A,
RG = 25
(Note 4, 5)
VDS = -400 V, ID = -1.5 A,
VGS = -10 V
(Note 4, 5)
--
--
--
--
--
--
--
9.0
25
27
30
11
2.0
5.6
--
--
-1
-10
-100
100
-5.0
10.5
--
350
50
8.0
30
60
65
70
14
--
--
V
V/°C
µA
µA
nA
nA
V
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
ISM Maximum Pulsed Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.5 A
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = -1.5 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 88mH, IAS = -1.5A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD -1.5A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
--
--
--
--
--
-- -1.5
-- -6.0
-- -5.0
200 --
0.7 --
A
A
V
ns
µC
©2000 Fairchild Semiconductor International
Rev. A2, December 2000

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Typical Characteristics
Top :
VGS
-15.0 V
-10.0 V
-8.0 V
-7.0 V
100 -6.5 V
-6.0 V
Bottom : -5.5 V
10-1
10-2
10-1
Notes :
1. 250μs Pulse Test
2. TC = 25
100 101
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
16
14
V = - 10V
GS
12
V = - 20V
GS
10
8
Note : TJ = 25
6
01234
-I , Drain Current [A]
D
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
600
500
400
300
200
100
0
10-1
C = C + C (C = shorted)
iss gs gd ds
C =C +C
oss ds gd
C =C
rss gd
C
iss
C
oss
C
rss
Notes :
1. V = 0 V
GS
2. f = 1 MHz
100 101
-V , Drain-Source Voltage [V]
DS
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
100
10-1
2
150
25
-55
Notes :
1. VDS = -50V
2. 250μs Pulse Test
468
-VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
100
10-1
0.0
15025
Notes :
1. VGS = 0V
2. 250μs Pulse Test
0.5 1.0 1.5 2.0 2.5
-VSD , Source-Drain Voltage [V]
3.0
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
V = -100V
10 DS
V = -250V
DS
8 V = -400V
DS
6
4
2
Note : ID = -1.5 A
0
0 2 4 6 8 10 12
Q , Total Gate Charge [nC]
G
Figure 6. Gate Charge Characteristics
Rev. A2, December 2000

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes :
1. VGS = 0 V
2. ID = -250 μA
0.8
-100
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
101
is Limited by R
DS(on)
1 ms 100 µs
10 ms
100
DC
10-1
10-2
100
Notes :
1. T = 25 oC
C
2. T = 150 oC
J
3. Single Pulse
101 102
-VDS, Drain-Source Voltage [V]
103
Figure 9. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = -10 V
2. ID = -0.75 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
1.5
1.2
0.9
0.6
0.3
0.0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
10 0 D = 0 .5
1 0 -1
0 .2
0 .1
0 .0 5
0 .0 2
0 .0 1
s in g le p u ls e
N o te s :
1 . Z θ JC(t) = 1 .9 8 /W M a x.
2 . D u ty F a c to r, D = t /t
12
3 . T JM - T C = P D M * Z θ JC(t)
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A2, December 2000

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Gate Charge Test Circuit & Waveform
50KΩ
Same Type
as DUT
12V 200nF
300nF
VGS
-10V
Qg
VGS
VDS
Qgs Qgd
-3mA
DUT
Charge
Resistive Switching Test Circuit & Waveforms
-10V
VDS
VGS
RG
RL
VDD
DUT
td(on)
VGS
10%
t on
tr
VDS
90%
t off
td(off)
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L
VDS
EAS =
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
t p Time
ID
RG
VDD
VDD
ID (t)
VDS (t)
-10V
tp
DUT
IAS
BVDSS
©2000 Fairchild Semiconductor International
Rev. A2, December 2000