FQB3P20.pdf 데이터시트 (총 9 페이지) - 파일 다운로드 FQB3P20 데이타시트 다운로드

No Preview Available !

FQB3P20 / FQI3P20
200V P-Channel MOSFET
April 2000
QFETTM
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters.
Features
• -2.8A, -200V, RDS(on) = 2.7@VGS = -10 V
• Low gate charge ( typical 6.0 nC)
• Low Crss ( typical 7.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
PD Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
G!
S
!




!
D
FQB3P20 / FQI3P20
-200
-2.8
-1.77
-11.2
±30
150
-2.8
5.2
-5.5
3.13
52
0.42
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Typ
Max
Units
-- 2.4 °CW
-- 40 °CW
--
62.5
°CW
©2000 Fairchild Semiconductor International
Rev. A, April 2000

No Preview Available !

Electrical CharacteristicsTC = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
IDSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = -250 µA
ID = -250 µA, Referenced to 25°C
VDS = -200 V, VGS = 0 V
VDS = -160 V, TC = 125°C
VGS = -30 V, VDS = 0 V
VGS = 30 V, VDS = 0 V
-200
--
--
--
--
--
--
-0.18
--
--
--
--
--
--
-1
-10
-100
100
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = -250 µA
-3.0 --
VGS = -10 V, ID = -1.4 A
-- 2.06
VDS = -40 V, ID = -1.4 A (Note 4) -- 1.23
-5.0
2.7
--
Dynamic Characteristics
Ciss
Coss
Input Capacitance
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
-- 190 250
-- 45 60
-- 7.5 10
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = -100 V, ID = -2.8 A,
RG = 25
-- 8.5 25
-- 35 80
-- 12 35
(Note 4, 5)
--
25
60
VDS = -160 V, ID = -2.8 A,
-- 6.0 8.0
VGS = -10 V
-- 1.7
--
(Note 4, 5)
--
2.9
--
V
V/°C
µA
µA
nA
nA
V
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- -2.8 A
ISM Maximum Pulsed Drain-Source Diode Forward Current
--
-- -11.2
A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -2.8 A
-- -- -5.0 V
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = -2.8 A,
-- 100
dIF / dt = 100 A/µs
(Note 4) -- 0.34
--
--
ns
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 29mH, IAS = -2.8A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD  -2.8A, di/dt  300A/µs, VDD  BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width  300µs, Duty cycle  2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, April 2000

No Preview Available !

Typical Characteristics
101 V
Top : -15.0GSV
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-6.0 V
Bottom: -5.5 V
100
10-1
 Notes :
1. 250s Pulse Test
2. TC = 25
10-1 100 101
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
10
8
VGS = - 10V
6
V = - 20V
GS
4
2
 Note : TJ = 25
0
02468
-I , Drain Current [A]
D
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
400
C = C + C (C = shorted)
iss gs gd ds
C =C +C
oss ds gd
C =C
rss gd
300 C
iss
Coss
200
 Notes :
Crss
1. VGS = 0 V
2. f = 1 MHz
100
0
10-1 100 101
-VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
101
100
10-1
2
150
25
-55
 Notes :
1. VDS = -40V
2. 250s Pulse Test
468
-VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
101
100
150 25
10-1
0.4
 Notes :
1. V = 0V
GS
2. 250s Pulse Test
0.8 1.2 1.6 2.0 2.4
-VSD , Source-Drain Voltage [V]
2.8
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10 VDS = -40V
VDS = -100V
8 VDS = -160V
6
4
2
 Note : ID = -2.8 A
0
01234567
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, April 2000

No Preview Available !

Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes:
1. VGS =0V
2. ID=-250A
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
102
Operation in This Area
is Limited by R DS(on)
101
100 µs
1 ms
10 ms
DC
100
10-1
10-2
100
 Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
-VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5
0.0
-100
 Notes :
1. VGS = -10 V
2. ID = -1.4 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0.0
25
50 75 100 125
TC, Case Temperature []
150
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D = 0.5
0 .2
0 .1
0 .05
0 .02
0 .01
sin g le p u lse
 N otes :
1.
Z

(t)
JC
=
2 .4
 /W
M ax.
2. D uty F a ctor, D =t1/t2
3.
T
JM
-
T
C
=
P
DM
*
Z

(t)
JC
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t , S q u a re W a ve P u lse D u ra tio n [se c]
1
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000

No Preview Available !

Gate Charge Test Circuit & Waveform
50K
Same Type
as DUT
12V 200nF
300nF
VGS
-10V
Qg
VGS
VDS
Qgs Qgd
-3mA
DUT
Charge
Resistive Switching Test Circuit & Waveforms
-10V
VDS
VGS
RG
RL
VDD
DUT
td(on)
VGS 10%
t on
tr
VDS
90%
t off
td(off)
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L
VDS
ID
EAS =
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
t p Time
RG
VDD
VDD
ID (t)
VDS (t)
-10V
tp
DUT
IAS
BVDSS
©2000 Fairchild Semiconductor International
Rev. A, April 2000