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FQB4N60 / FQI4N60
600V N-Channel MOSFET
April 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
Features
• 4.4A, 600V, RDS(on) = 2.2@VGS = 10 V
• Low gate charge ( typical 15 nC)
• Low Crss ( typical 8.0 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
PD Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
D
!
"
!"
G!
"
"
!
S
FQB4N60 / FQI4N60
600
4.4
2.8
17.6
±30
260
4.4
10.6
4.5
3.13
106
0.6
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Typ
Max
Units
--
1.18
°CW
-- 40 °CW
--
62.5
°CW
©2000 Fairchild Semiconductor International
Rev. A, April 2000

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Electrical CharacteristicsTC = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
IDSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 600 V, VGS = 0 V
VDS = 480 V, TC = 125°C
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
600
--
--
--
--
--
--
0.6
--
--
--
--
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
3.0 --
VGS = 10 V, ID = 2.2 A
-- 1.77
VDS = 50 V, ID = 2.2 A (Note 4) --
4.0
Dynamic Characteristics
Ciss
Coss
Input Capacitance
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 520
-- 70
-- 8
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 300 V, ID = 4.4 A,
RG = 25
(Note 4, 5)
VDS = 480 V, ID = 4.4 A,
VGS = 10 V
(Note 4, 5)
--
--
--
--
--
--
--
13
45
25
35
15
3.4
7.1
--
--
10
100
100
-100
5.0
2.2
--
670
90
11
35
100
60
80
20
--
--
V
V/°C
µA
µA
nA
nA
V
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
ISM Maximum Pulsed Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 4.4 A
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 4.4 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 25mH, IAS = 4.4A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD  4.4A, di/dt  200A/µs, VDD  BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width  300µs, Duty cycle  2%
5. Essentially independent of operating temperature
--
--
--
--
--
-- 4.4
-- 17.6
-- 1.4
250 --
1.5 --
A
A
V
ns
µC
©2000 Fairchild Semiconductor International
Rev. A, April 2000

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Typical Characteristics
101 Top :
VGS
15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
100
10-1
10-1
Notes :
1. 250s Pulse Test
2. TC = 25
100 101
VDS , Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
6
5
VGS = 10V
4 VGS = 20V
3
2
1
 Note : TJ = 25
0
0 2 4 6 8 10 12
ID, Drain Current [A]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
1000
800
600
400
200
C
iss
Coss
Crss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
 Notes :
1. VGS = 0 V
2. f = 1 MHz
0
10-1 100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
101
100
10-1
2
150
25
-55
 Notes :
1. VDS = 50V
2. 250s Pulse Test
468
VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
101
100
150 25
 Notes :
1. V = 0V
2. 25GS0s Pulse Test
10-1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD , Source-Drain Voltage [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
VDS = 120V
10
VDS = 300V
VDS = 480V
8
6
4
2
 Note : ID = 4.4 A
0
0 3 6 9 12 15
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, April 2000

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes:
1. VGS =0V
2. ID=250A
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
is Limited by R
DS(on)
101
100
10-1
100
100 µs
1 ms
10 ms
DC
 Notes :
1. T = 25 oC
C
2. T = 150 oC
J
3. Single Pulse
101 102
VDS, Drain-Source Voltage [V]
103
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
 Notes :
1. V = 10 V
GS
2. ID = 2.2 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
5
4
3
2
1
0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
100
D =0.5
0 .2
1 0 -1
0 .1
0 .05
0 .02
0 .01
1 0 -2
1 0 -5
s in g le p u ls e
 N ote s :
1 . Z  JC(t) = 1 .1 8  /W M a x .
2. D u ty F actor, D =t1/t2
3 . T JM - T C = P D M * Z  JC(t)
PDM
t1
t2
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t , S q u a re W a v e P u ls e D u ra tio n [s e c ]
1
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000

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Gate Charge Test Circuit & Waveform
50K
Same Type
as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
10V
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS =
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
10V
tp
DUT
VDD VDS (t)
t p Time
©2000 Fairchild Semiconductor International
Rev. A, April 2000