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FQT4N20L
200V LOGIC N-Channel MOSFET
May 2001
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supply, DC-AC converters for
uninterrupted power supply, motor control.
Features
• 0.85A, 200V, RDS(on) = 1.35@VGS = 10 V
• Low gate charge ( typical 4.0 nC)
• Low Crss ( typical 6.0 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• Low level gate drive requirement allowing direct
opration from logic drivers
D
S
G SOT-223
FQT Series
D
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!"
G!
"
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!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 70°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
RθJA
Thermal Resistance, Junction-to-Ambient *
* When mounted on the minimum pad size recommended (PCB Mount)
FQT4N20L
200
0.85
0.68
3.4
± 20
52
0.85
0.22
5.5
2.2
0.018
-55 to +150
300
Typ Max
-- 57
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
©2001 Fairchild Semiconductor Corporation
Rev. A, May 2001

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Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS/
TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
VGS = 0 V, ID = 250 µA
200 --
ID = 250 µA, Referenced to 25°C -- 0.16
IDSS
Zero Gate Voltage Drain Current
VDS = 200 V, VGS = 0 V
VDS = 160 V, TC = 125°C
-- --
-- --
IGSSF
IGSSR
Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V
Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V
-- --
-- --
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on) Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
1.0 --
VGS = 10 V, ID = 0.425 A
VGS = 5 V, ID = 0.425 A
--
1.10
1.13
VDS = 30 V, ID = 0.425 A (Note 4) -- 1.42
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 240
-- 36
-- 6
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 100 V, ID = 3.8 A,
RG = 25
(Note 4, 5)
VDS = 160 V, ID = 3.8 A,
VGS = 5 V
(Note 4, 5)
--
--
--
--
--
--
--
7
70
15
40
4.0
1.0
1.9
--
--
1
10
100
-100
2.0
1.35
1.40
--
310
45
8
25
150
40
90
5.2
--
--
V
V/°C
µA
µA
nA
nA
V
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 0.85
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- 3.4
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.85 A
-- -- 1.5
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 3.8 A,
-- 90
dIF / dt = 100 A/µs
(Note 4) -- 0.25
--
--
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 108mH, IAS = 0.85A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 3.8A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
A
A
V
ns
µC
©2001 Fairchild Semiconductor Corporation
Rev. A, May 2001

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Typical Characteristics
Top :
VGS
10 V
8.0 V
6.0 V
5.0 V
4.5 V
100
4.0 V
3.5 V
Bottom : 3.0 V
10-1
10-1
Notes :
1. 250μ s Pulse Test
2. TC = 25
100 101
V , Drain-Source Voltage [V]
DS
Figure 1. On-Region Characteristics
8
6
V =5V
GS
V = 10V
GS
4
2
0
02468
ID , Drain Current [A]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
450
400
350
300
250
200
150
100
50
0
10-1
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
C =C
rss gd
C
iss
C
oss
C
rss
Notes :
1. VGS = 0 V
2. f = 1 MHz
100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2001 Fairchild Semiconductor Corporation
100
150
25
-55
Notes :
1.
2.
2V5DS0μ=
30V
s Pulse
Test
10-1
0
2468
VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
100
10-1
0.2
15025
Notes :
1. V = 0V
2. 25G0Sμ s Pulse Test
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
V , Source-Drain Voltage [V]
SD
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10
V = 40V
DS
V = 100V
DS
8
VDS = 160V
6
4
2
Note : ID = 3.8 A
0
012345678
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, May 2001

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes :
1.
2.
IVDG=S =2500Vμ
A
0.8
-100
-50 0 50 100 150
T , Junction Temperature [oC]
J
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
101 Operation in This Area
is Limited by RDS(on)
100 µs
100 1 ms
10 ms
100 ms
DC
10-1
10-2
10-3
10-1
Notes :
1. T = 25 oC
C
2. TJ = 150 oC
3. Single Pulse
100 101
VDS, Drain-Source Voltage [V]
102
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. V = 10 V
GS
2. ID = 0.425 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
1.0
0.8
0.6
0.4
0.2
0.0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
102
D =0 .5
101 0.2
0 .1
0 .0 5
0 .0 2
100 0.01
s in gle pu ls e
N otes :
1 . Z θ J C(t) = 5 7 /W M a x .
2. D u ty F ac to r, D = t1/t2
3 . T J M - T C = P D M * Z θ J C( t )
PDM
t1
t2
1 0 -1
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
101
102
t1, S quare W ave P ulse D uration [sec]
Figure 11. Transient Thermal Response Curve
103
©2001 Fairchild Semiconductor Corporation
Rev. A, May 2001

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Gate Charge Test Circuit & Waveform
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
5V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
VGS
RG
RL
VDD
VDS
90%
5V
DUT
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
10V
tp
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS
=
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
©2001 Fairchild Semiconductor Corporation
Rev. A, May 2001