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FQD20N06LE / FQU20N06LE
60V LOGIC N-Channel MOSFET
May 2001
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, DC/
DC converters, and high efficiency switching for power
management in portable and battery operated products.
Features
• 17.2A, 60V, RDS(on) = 0.06@ VGS = 10V
• Low gate charge ( typical 9.5 nC)
• Low Crss ( typical 35 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 150oC maximum junction temperature rating
• Low level gate drive requirements allowing direct
operation form logic drivers
• Built-in ESD Protection Diode
D
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQD20N06LE / FQU20N06LE
60
17.2
10.9
68.8
± 20
170
17.2
3.8
7.0
2.5
38
0.30
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2001 Fairchild Semiconductor Corporation
Typ Max
-- 3.28
-- 50
-- 110
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
Rev. B1. May 2001

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Electrical Characteristics
Symbol
Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
VGS = 0 V, ID = 250 µA
60 -- -- V
ID = 250 µA, Referenced to 25°C -- 0.06 -- V/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 60 V, VGS = 0 V
VDS = 48 V, TC = 125°C
-- -- 1 µA
-- -- 10 µA
IGSSF
IGSSR
Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V
Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V
-- -- 10 µA
-- -- -10 µA
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on) Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 8.6 A
VGS = 5 V, ID = 8.6 A
VDS = 25 V, ID = 8.6 A
(Note 4)
1.0 --
2.5
-- 0.046 0.06
-- 0.057 0.075
-- 11
--
V
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 506 665
-- 175 230
-- 35
45
pF
pF
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf Turn-Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 30 V, ID = 10.5 A,
RG = 25
-- 13
39
-- 220 453
-- 45 103
(Note 4, 5) -- 100 214
VDS = 48 V, ID = 21 A,
-- 9.5
VGS = 5 V
-- 2.5
(Note 4, 5) -- 5.5
13
--
--
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 17.2 A
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- 68.8 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 17.2 A
-- -- 1.5 V
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IF = 21 A,
-- 64
dIF / dt = 100 A/µs
(Note 4) -- 105
--
--
ns
nC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 670µH, IAS = 17.2A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 21A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2001 Fairchild Semiconductor Corporation
Rev. B1. May 2001

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Typical Characteristics
VGS
Top : 10.0V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom: 3.0 V
101
100
10-1
Notes :
1. 250μ s Pulse Test
2. TC = 25
100
VDS, Drain-Source Voltage [V]
101
Figure 1. On-Region Characteristics
100
80 V = 5V
GS
V = 10V
GS
60
40
Note : TJ = 25
20
0 10 20 30 40 50 60
ID, Drain Current [A]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
1500
1000
500
C
oss
C
iss
C
rss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Notes :
1. VGS = 0 V
2. f = 1 MHz
0
10-1 100 101
V , Drain-Source Voltage [V]
DS
Figure 5. Capacitance Characteristics
©2001 Fairchild Semiconductor Corporation
101
100 150
10-1
0
25
2
-55
Notes :
1.
2.
V25DS0μ=s25PVulse
Test
46
V , Gate-Source Voltage [V]
GS
8
10
Figure 2. Transfer Characteristics
101
100
10-1
0.2
150
25
Notes :
1.
2.
2V5GS0μ=s0VPulse
Test
0.4 0.6 0.8 1.0 1.2
VSD, Source-Drain voltage [V]
1.4
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
12
10
VDS = 30V
V = 48V
8 DS
6
4
2
Note : ID = 21A
0
0 4 8 12 16 20
Q , Total Gate Charge [nC]
G
Figure 6. Gate Charge Characteristics
Rev. B1. May 2001

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes:
1. V =0V
2.
GS
ID =
250
μ
A
0.8
-100
-50 0 50 100 150
TJ, JunctionTemperature[oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
103
Operation in This Area
is Limited by R
DS(on)
102
100 µs
1 ms
101 10 ms
DC
100
10-1
10-1
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
100 101
VDS, Drain-Source Voltage [V]
102
Figure 9. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. V = 10 V
GS
2. I = 8.6 A
D
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
20
15
10
5
0
25 50 75 100 125 150
T , Case Temperature []
C
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D =0 .5
0 .2
0 .1
0.0 5
0.0 2
0.0 1
sin g le p u ls e
Notes :
1 . Z θ J C( t ) = 3 . 2 8 /W M a x .
2 . D u t y Fa c t o r , D = t 1/t 2
3 . T J M - T C = P D M * Z θ J C( t )
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
101
©2001 Fairchild Semiconductor Corporation
Rev. B1. May 2001

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Gate Charge Test Circuit & Waveform
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
5V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
VGS
RG
RL
VDD
VDS
90%
5V
DUT
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS =
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
10V
tp
DUT
VDD VDS (t)
t p Time
©2001 Fairchild Semiconductor Corporation
Rev. B1. May 2001