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EDGE HIGH-PERFORMANCE PRODUCTS
Description
Edge142
Per Pin timing Deskew w 4x2
Cross Point Switch
Features
The Edge142 is a 4 X 2 cross point switch with output
edge deskew capability. Manufactured in a high
performance bipolar process, it is designed primarily for
channel deskew applications in VLSI and Mixed-Signal
test equipment.
Any of the four input signals may be selected as the
source for either output. The 142 performs test head
multiplexing, adjacent channel multiplexing, and signal
buffering for both the drive and receive signals, in addition
to timing deskew.
• Very Narrow (<1 ns) Pulse Width Capability
• Fmax > 850 MHz
• Independent Delay Adjustments for Positive and
Negative Transitions
• Delay Range of 1.5 ns
• Trailing Edge Adjust Range of 300 ps
• Small Footprint: 52-pin MQFP Package
(10 X 10 mm) with Internal Heat Spreader or
Die Form
The delay value (and resolution) is controlled via an
external voltage DAC. The delay element is designed
specifically to be monotonic and very stable while
delaying a very narrow pulse over a limited delay range.
Applications
The part offers separate delays for rising vs. falling edges.
The rising edge delay range is 1.5 ns and the falling
edge adjustment range is 300 ps.
The Edge142 is also well suited for 1:2 or 1:4 signal
fanout applications that require:
- multiple signal sources
- output enable / disable
- timing deskew on the output
signals.
• Automatic Test Equipment
– Per pin deskew in VLSI, Mixed-Signal, and Memory
Testers
– Clock Distribution with timing adjustment
Functional Block Diagram
VDELAY 0
VFALL 0
IN0 / 0*
IN1 / 1*
IN2 / 2*
IN3 / 3*
4X2
T
T
OUT0 / 0*
MUX OUT0 / 0*
MUX OUT1 / 1*
OUT1 / 1*
Revision 1, February 14, 2000
VFALL 1
VDELAY 1
1
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Edge142
EDGE HIGH-PERFORMANCE PRODUCTS
PIN Description
Pin Name
Digital
IN0, IN0*
IN1, IN1*
IN2, IN2*
IN3, IN3*
OUT0, OUT*
OUT1, OUT1*
MUX OUT0, 0*
MUX OUT1, 1*
S00, S01
S10, S11
MUX0 SEL
MUX1 SEL
EN*
MUX EN
Analog
VDELAY0
VDELAY1
VFALL0
VFALL1
VMID0
VMID1
REXT1
REXT2
COMP1,
COMP2
TDP, TDN
Power
GND
VEE
Pin #
Description
41, 42
44, 45
48, 47
51, 50
26, 25
14, 15
23, 22
17, 18
32, 31
8, 9
30
10
29
11
The multiplexer input signals. (Differential digital inputs.)
The selected and delayed output signals. (Differential ECL compatible
outputs.)
Selected monitor outputs. (Differential ECL compatible levels.)
Single-ended 10KH ECL compatible inputs which select the channel 0
and channel 1 source.
Single-ended 10KH ECL compatible inputs which select the two output
monitor sources.
Single-ended 10KH ECL compatible input which enables the delayed
outputs.
Single-ended 10KH ECL compatible input which enables the monitor
outputs.
39
1
37
3
38
2
36
4
35
5
21, 19
Analog voltage inputs which control the amount of propagation delay for
each channel.
Analog voltage inputs which control the amount of falling edge delay for
each channel.
Analog voltage inputs which control the amount of pulse width
compensation for each channel.
Analog input current used to establish the bias current for the VDELAY,
VFALL, and VMIDinputs.
Analog input current used to establish the bias level for the delay cells.
Op Amp compensation capacitors.
Positive and negative terminals to the thermal diode string.
6, 12, 13, 16,
24, 27, 28, 34,
40, 43, 49, 52
Device ground (positive device supply).
7, 20, 33, 46
2000 Semtech Corp.
2
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EDGE HIGH-PERFORMANCE PRODUCTS
PIN Description (continued)
Edge142
GND
IN0
IN0*
GND
IN1
IN1*
VEE
IN2*
IN2
GND
IN3*
IN3
GND
40
41
42
43
44
45
46
47
48
49
50
51
52
26 OUT0
25 OUT0*
24 GND
23 MUX OUT0
22 MUX PUT0*
21 TDP
20 VEE
19 TDN
18 MUX OUT1*
17 MUX OUT1
16 GND
15 OUT1*
14 OUT1
52-Pin MQFP 10mm x 10mm
with Internal Heat Spreader
2000 Semtech Corp.
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Edge142
EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description
Chip Overview
The Edge142 is a 4 X 2 cross point switch and deskew
element, offering an 1.5 ns delay (Tspan), where the
VDELAY inputs adjust the overall propagation delay of
the part. In addition, the part supports a separate falling
edge delay of 300 ps (Tfall), where the VFALL inputs
control the falling edge delay.
Two additional outputs, which are selectable from either
OUT0 or OUT1, are provided. These outputs are useful
when attempting to fanout a selected input to multiple
destination without using and external buffer. All output
signals may be enabled or disabled.
The Edge142 is designed to be monotonic and very
stable. Figure 1 shows a simplified block diagram.
IN0 / 0*
IN1 / 1*
IN2 / 2*
IN3 / 3*
S01 S00 VFALL0 VMID0 VDELAY0
MUX0 SEL EN* MUX EN
0
1
T T
2
0
3
1
1
3
0
2
T T
1
0
S11 S10 VFALL1 VMID1 VDELAY1
MUX1 SEL
2000 Semtech Corp.
Figure 1. Edge142 Block Diagram
4
OUT0 / 0*
MUX OUT0 / 0*
MUX OUT1 / 1*
OUT1 / 1*
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Edge142
EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description (continued)
Input Multiplexer
Output Enable
The Edge142 offers a 4 X 2 cross point switch in which
one of four input signals are selected to two independent
outputs. Each output signals propagation delay and
pulse width may then be adjusted via external control.
Both the output and multiplexer output signals may be
enabled or disabled, as documented below.
EN* OUT/OUT* MUX EN MUX(0,1)OUT
The truth table below documents the multiplexer
functionality. Notice that there are no restrictions
between the selection of channel 0 and channel 1.
0 Active
10
Propagation Delay Adjust
0
1
0
Active
SEL01 SEL00 OUT0 SEL11 SEL10 OUT1
0
0 IN0 0
0 IN0
0
1 IN1 0
1 IN1
The Edge142 supports two independent delay functions,
which are described in the table below.
1
0 IN2 1
0 IN2
Tpd+
Tpd-
1
1 IN3 1
1 IN3
VDELAY
1.5 ns
1.5 ns
Output Multiplexer
The Edge142 provides MUX OUT0 / MUX OUT0* and
MUX OUT1 / MUX OUT1*, additional buffered differential
output signals. These signals are selected from OUT0
or OUT1, depending on the state of MUX SEL, as indicated
in the table below.
MUX(0,1) SEL MUXOUT0
MUXOUT1
0 OUT0 / OUT0* OUT1 / OUT1*
VFALL 0 ps 300 ps
VDELAY controls the propagation delay of both the rising
and falling edge (see Figure 2). An input signal is
selected and then delayed by some programmable
amount (Tspan) determined by the analog input VDELAY.
The rising and falling edges are delayed equally. The
propagation delay for a rising and a falling edge is defined
as
Tpd+, Tpd- = Tpd(nom) + Tspan
1 OUT1 / OUT1* OUT0 / OUT0*
The MUX OUT signals allow either of the delayed outputs
to be sent to an alternative destination without having
to daisy chain the outputs to multiple destinations. This
feature permits point to point routing of all critical timing
signals in an effort to maintain the cleanest transmission
lines for these signals.
The MUX OUT signals also provide a method for sending
one common selected input signal to two independent
destinations. This feature is useful when fanning out
driver data and driver enable signals to multiple test
heads.
where Tpd(nom) is the propagation delay of the part
with zero programmed delay, and Tspan is the additional
delay programmed via the VDELAY input. Notice that
Tspan can be either positive or negative, depending on
the nominal biasing of VDELAY, thus allowing bidirectional
propagation delay adjustment. The transfer function
for Tspan vs. VDELAY is shown in Figure 4.
INPUT
TPD min
TPD min
OUTPUT
(VDELAY = +0.1V)
OUTPUT
(VDELAY = –1.3V)
Tspan
Tspan
2000 Semtech Corp.
Figure 2. VDELAY Control
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