7006.pdf 데이터시트 (총 29 페이지) - 파일 다운로드 7006 데이타시트 다운로드

No Preview Available !

ACT7005/7006
Single Package Solution
Dual Transceiver, Protocol, Subsystem
Features
• Incorporates Transceivers, Protocol, and System Interface Components into a
Single Hybrid Package
• Functions as a Remote Terminal or Bus Controller
• Interfaces to µP as a Simple Peripheral Unit
• +5V Operation
CIRCUIT TECHNOLOGY
www.aeroflex.com
• Provides 2k by 16 of Double Buffered RAM Storage for Transmit and Receive
Subaddresses
• Pin Programmable for 8-bit or 16-bit Microprocessors
• Full Military (-55°C to +125°C) Temperature Range
General Description
The ACT7005/6 Series provides a complete one package interface between the MIL-STD-1553 bus and all
microprocessor systems. The hybrid provides all data buffers and control registers to function as a Bus
Controller or Remote Terminal. Control of the hybrid by the subsystem is through simple I/O port commands.
Internal hybrid logic removes all critical timing imposed on a typical subsystem, thereby simplifying the
implementation of this interface.
BUS "0"
DUAL
TX/RX
1553
PROTOCOL
BUS "1"
µP
INTERFACE
RAM
INTERRUPTS/
CONTROL
SIGNALS
S
U
B
S
Y
S
T
E
M
8/16
BIT
I/O
ACT7005 / ACT7006
Block Diagram
eroflex Circuit Technology – Data Bus Modules For The Future © SCD7005 REV B 8/2/01

No Preview Available !

Aeroflex Circuit Technology
2 SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700

No Preview Available !

Parameter
Power Supply Voltage (VCC)
Power Supply Voltage (VCCL & VDD)
Receiver Differential Input
(DATA CH A/B / DATA CH A/B)
Receiver Input Voltage
(DATA CH A/B or DATA CH A/B – Common Mode)
Operating Case Temperature Range (TC)
Transmission Duty Cycle at TC = +125°C
Min Max
-0.3 7.0
-0.3 7.0
-10 +10
-5 +5
-55 +125
- 100
Units
V
V
V
V
°C
%
Table 1 – Absolute Maximum Ratings
Parameter/Condition
Symbol
Power Supply Voltage
VCC
Total supply current "standby" mode or transmitting at
less than 1% duty cycle (e.g. 20µs of transmission every
2ms or longer interval). 2/
ICC@1%
Total supply current transmitting at 1MHz into a 35load
at Point A in Figure 1. 2/ 1/
ICC @ 25%
ICC @ 50%
ICC @ 100%
Note:
1/ Decreases linearly to applicable "standyby" values at zero duty cycle.
2/ Represents one channel only.
Min Typ Max Unit
4.75
5 5.5 mA
18 30 mA
150 175 mA
300 350 mA
600 700 mA
Table 2 – Analog Transceiver Power Supply Characteristics
Aeroflex Circuit Technology
3 SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700

No Preview Available !

Parameter/Condition
Differential impedance DC to 1MHz,
See Figure 4
Point A
Point C
Differential voltage range
Input common mode voltage range
Common mode rejection ratio (from point A, Figure 4)
Threshold characteristics (sine wave at 1MHz)
NOTE: Threshold voltages refer Figure 4
Point A
Point C
Symbol
ZIO
VDIR
VICR
CMRR
VTH1
VTH2
Min
2K
1K
-10
-5
40
0.8
0.56
Max Unit
+10
+5
1.1
0.86
VPEAK
VPEAK
dB
Vp-p
Vp-p
Table 3 – Analog Transceiver Electrical Characteristics (Receiver Section)
(Over Full Temperature Range)
Parameter / Condition
Symbol
Differential output level at point B,
See Figure 4
140Point B
70Point C
VO
Differential Output Noise at Point A, See Figure 4
Output Offset at point A in Figure 4,
2.5µs after mid-bit crossing of parity bit
of last word of a 660µs message
Point A (35Ω)
Point C (70Ω)
Rise and Fall times (10% to 90% of p-p output)
VNOI
Vos1
Vos2
tR & tF
Min
24
18
-90
-250
100
Typ Max Unit
35 Vp-p
25 Vp-p
10 mVp-p
+90
+250
mV
mV
160 300
ns
Table 4 – Analog Transceiver Electrical Characteristics (Transmitter Section)
(Over Full Temperature Range)
Aeroflex Circuit Technology
4 SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700

No Preview Available !

Symbol
Parameter
Min Typ Max Units
VDD
Logic Supply
4.5 5.0 5.5
VIH
Input "1"
2.4
VIL Input "0"
0.6
IL
Input I
-450 -600 -900
IIH
Input I
-250 -400 -750
IL
Input I
-50 -200 -800
IIH
Input I
-50 -200 -800
IL
Input I
-25 -125 -400
IIH
Input I
-25 -125 -400
VOH
Output "1"
2.4
VOL Output "0"
0.4
VDD Static I
50
VDD Dynamic I
170
Notes:
1. VDD = 5.5V
A. For RTAD0/1/2/3/4 and RTADPAR with VIL = 0.4V
B. For RTAD0/1/2/3/4 and RTADPAR with VIH = 2.4V
C. FOR BCSTEN WITH VIL = 0.4V, Test 1, 6MHz
D. FOR BCSTEN WITH VIH = 2.4V, Test 1, 6MHz
VDC
V
V
µA
µA
µA
µA
µA
µA
VDC
VDC
mA
mA
Conditions
Note 1A
Note 1B
Note 1C
Note 1D
Note 2A
Note 2B
Note 3A
Note 3B
Note 4A
Note 4B
2. All remaining inputs and I/O
VDD = 5.5V
A. VIL = 0.4V
B. VIH = 2.4V
3. A. VDD = 4.5V and IOH = 3mA
B. VDD = 5.5V and IOL = 3mA
4. VDD = 5.5V
A. Clock Input = 6MHz (45-55% Duty Cycle / TTL Levels), All remaining inputs = VDD,
All Outputs = Open Circuit
B. During a 32 word FIFO to RAM or RAM to FIFO block move.
Aeroflex Circuit Technology
Table 5 – Logic Electrical Characteristics
(Over Full Temperature Range)
5 SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700