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®
Data Sheet
August 2003
ISL6557A
FN9068.2
Multi-Phase PWM Controller for
Core-Voltage Regulation
The ISL6557A provides core-voltage regulation by driving up
to four interleaved synchronous-rectified buck-converter
channels in parallel. Intersil multi-phase controllers together
with Intersil MOSFET drivers form the basis for the most
reliable power-suppply solutions available to power the
latest industry-leading microprocessors. Multi-phase buck
converter architecture uses interleaved timing to multiply
ripple frequency and reduce input and output ripple currents.
Lower ripple results in lower total component cost, reduced
dissipation, and smaller implementation area. Pre-
configured for 4-phase operation, the ISL6557A offers the
flexibility of selectable 2- or 3-phase operation. Simply
connect the unused PWM pins to VCC. The channel
switching frequency is adjustable in the range of 50kHz to
igMHz giving the designer the ultimate flexibility in managing
the balance between high-speed response and good
thermal management.
New features on the ISL6557A include Dynamic-VID™
technology allowing seamless on-the-fly VID changes with
no need for any additional external components. When the
ISL6557A receives a new VID code, it incrementally steps
the output voltage to the new level. Dynamic VID changes
are fast and reliable with no output voltage overshoot or
undershoot. The RGND and VSEN pins provide inputs for
differential remote voltage sensing to improve regulation and
protection accuracy. A threshold-sensitive enable pin (EN)
can be used with an external resistor divider to optionally set
the power-on voltage level. This allows optional start-up
coordination with Intersil MOSFET drivers or any other
devices powered from a separate supply.
Like other Intersil multiphase controllers, the ISL6557A uses
cost and space-saving rDS(ON) sensing for channel current
balance, dynamic voltage positioning, and overcurrent
protection. Channel current balancing is automatic and
accurate with the integrated current-balance control system.
Overcurrent protection can be tailored to any application with
no need for additional parts. The IOUT pin carries a signal
proportional to load current and can be optionally connected
to FB for accurate load-line regulation.
An integrated DAC decodes the 5-bit logic signal present at
VID4-VID0 and provides an accurate reference for precision
voltage regulation. The high-bandwidth error amplifier,
differential remote-sensing amplifier, and accurate voltage
reference all work together to provide better than 0.8% total
system accuracy, and to enable the fastest transient
response available.
Features
• Multi-Phase Power Conversion
• Active Channel Current Balancing
• Precision rDS(ON) Current Sensing
- Low Cost
- Lossless
• Precision CORE Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.8% System Accuracy
• Microprocessor Voltage Identification Input
- Dynamic VID technology
- 5-Bit VID Input
- 0.800V to 1.550V in 25mV Steps
• Programmable Power-On Bias Level
• Programmable Droop Voltage
• Fast Transient Recovery Time
• Precision Enable Threshold
• Overcurrent Protection
• 2-, 3-, or 4-Phase Operation
• High Ripple Frequency. Channel Frequency Times
Number Channels (100kHz to 6MHz)
Ordering Information
PART NUMBER TEMP. (oC) PACKAGE PKG. DWG. #
ISL6557ACB
0 to 70
24-Ld SOIC M24.3
ISL6557ACB-T
24-Ld SOIC Tape and Reel
Pinout
ISL6557A 24 PIN (SOIC)
TOP VIEW
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
IOUT 8
VDIFF 9
VSEN 10
RGND 11
GND 12
24 VCC
23 EN
22 FS
21 PGOOD
20 PWM4
19 ISEN4
18 ISEN1
17 PWM1
16 PWM2
15 ISEN2
14 ISEN3
13 PWM3
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners. Dynamic VID™ is a trademark of Intersil Americas Inc.

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ISL6557A
Block Diagram
VDIFF
PGOOD
VCC
RGND
VSEN
COMP
VID0
VID1
VID2
VID3
VID4
-
x1
+
-
UV
+
x 0.9
+
OVP
-
2.1V
SOFT-
START
AND FAULT
LOGIC
POWER-ON
RESET (POR)
S
OV
LATCH
+
-
CLOCK AND
SAWTOOTH
GENERATOR
+
PWM
-
+
-
+
PWM
-
2.5V
DYNAMIC
VID
D/A
+
E/A
-
+
-
+
-
+
PWM
-
+
PWM
-
1.23V
-
+ EN
FS
PWM1
PWM2
PWM3
PWM4
FB
IOUT
CURRENT
CORRECTION
-
OC
+
I_TOT
IOC +
+
+
+
PHASE
NUMBER
CHANNEL
DETECTOR
ISEN1
ISEN2
ISEN3
ISEN4
GND
2

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ISL6557A
Typical Application - 4-Phase Buck Converter
+12V
VCC
BOOT
UGATE
PVCC
PHASE
HIP6601A
PWM
DRIVER
+5V LGATE
GND
VIN
PGOOD
VID4
VID3
VID2
VID1
VID0
RT
FB IOUT COMP
VDIFF
VCC
VSEN
EN
RGND
ISEN1
ISL6557A
PWM1
PWM2
ISEN2
PWM3
FS ISEN3
PWM4
ISEN4
GND
+12V
VCC
PVCC
BOOT
UGATE
PHASE
PWM
HIP6601A
DRIVER
LGATE
GND
+12V
VCC
BOOT
UGATE
PVCC
PWM
HIP6601A
DRIVER
PHASE
LGATE
GND
VIN
VIN
+12V
VCC
PVCC
BOOT
UGATE
PHASE
PWM
HIP6601A
DRIVER
LGATE
GND
VIN
3
µP
LOAD

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ISL6557A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Input, Output, or I/O Voltage . . . . . . . . . . GND -0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5kV
Recommended Operating Conditions
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. (See Tech Brief TB379 for details.)
Electrical Specifications Operating Conditions: VCC = 5V, TA = 0oC to 70oC, Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
INPUT SUPPLY POWER
Input Supply Current
RT = 100k, EN = 5V
10.5 15
RT = 100k, EN = 0V
5 9.2
Power-On Reset Threshold
VCC Rising
4.25 4.38 4.5
VCC Falling
3.75 3.86 4.0
Enable Threshold
EN Rising
1.206 1.230 1.254
EN Falling
1.106 1.15 1.194
Enable Hysteresis
60 100
Enable Current
EN = 3V
50
SYSTEM ACCURACY
System Accuracy
(Note 2)
-0.8 0.8
VID Pull Up
-40 -20 -10
VID Input Low Level
0.8
VID Input High Level (Note 3)
2.0
OSCILLATOR
Accuracy
-20 20
Frequency
RT = 110k(±1%)
250
Adjustment Range
80 1500
UNITS
mA
mA
V
V
V
V
mV
nA
%VID
µA
V
V
%
kHz
kHz
Sawtooth Amplitude
Duty-Cycle Range
ERROR AMPLIFIER
Open-Loop Gain
Open-Loop Bandwidth
Slew Rate
Maximum Output Voltage
RL = 10kto ground
CL = 100pF, RL = 10kto ground
CL = 100pF, RL = 10kto ground
RL = 10kto ground
1.33
0 75
V
%
72
18
5
3.6 4.1
dB
MHz
V/µs
V
REMOTE-SENSE AMPLIFIER
Input Impedance
Slew Rate
80 k
6 V/µs
Bandwidth
10 MHz
4

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ISL6557A
Electrical Specifications Operating Conditions: VCC = 5V, TA = 0oC to 70oC, Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
ISEN
Overcurrent Trip Level
-90 -75 -60
PROTECTION and MONITOR
Overvoltage Threshold
VSEN Rising
2.04 2.09 2.13
VSEN Falling
VID
Undervoltage Threshold
VSEN Rising
92
VSEN Falling
90
PGOOD Low Voltage
IPGOOD = 4mA
0.18 0.4
UNITS
µA
V
V
%VID
%VID
mV
NOTES:
2. These parts are designed and adjusted for accuracy within the system tolerance given in the Electrical Specifications. The system tolerance
accounts for offsets in the differential and error amplifiers; reference-voltage inaccuracies; temperature drift; and the full DAC adjustment range.
3. VID input levels above 2.9V may produce an reference-voltage offset inaccuracy.
Functional Pin Descriptions
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
IOUT 8
VDIFF 9
VSEN 10
RGND 11
GND 12
24 VCC
23 EN
22 FS
21 PGOOD
20 PWM4
19 ISEN4
18 ISEN1
17 PWM1
16 PWM2
15 ISEN2
14 ISEN3
13 PWM3
VID4, VID3, VID2, VID1, VID0 (Pins 1, 2, 3, 4, 5)
These are the inputs to the internal DAC that provides the
reference voltage for output regulation. Connect these pins
to either open-drain or active-pull-up type outputs. Pulling
these pins above 2.9V can cause a reference offset
inaccuracy.
FB (Pin 7) and COMP (Pin 6)
The internal error amplifier’s inverting input and output
respectively. These pins are connected to an external R-C
network to compensate the regulator.
IOUT (Pin 8)
The current out of this pin is proportional to output current
and is used for load-line regulation and load sharing. The
scale factor is set by the ratio of the ISEN resistors
(connected to pins 14, 15, 18, and 19) to the lower MOSFET
rDS(ON).
VDIFF (Pin 9), VSEN (Pin 10), RGND (Pin 11)
VSEN and RGND are the inputs to the differential remote-
sense amplifier. VDIFF is the output and it serves as the
input to the external regulation circuitry and the internal
protection circuitry. Connect VSEN and RGND to the sense
pins of the remote load.
GND (Pin 12)
Return for VCC and signal ground for the IC.
PWM3, PWM2, PWM1, PWM4 (Pins 13, 16, 17, 20)
Pulse-width modulation outputs. These logic outputs tell the
driver IC(s) when to turn the MOSFETs on and off.
ISEN3, ISEN2, ISEN1, ISEN4 (PINS 14, 15, 18, 19)
Current sense inputs. A resistor connected between these
pins and the respective phase nodes has a current
proportional to the current in the lower MOSFET during its
conduction interval. The current is used as a reference for
channel balancing, load sharing, protection, and load-line
regulation.
PGOOD (Pin 21)
PGOOD is an open-drain logic output that changes to a logic
low when the differential output voltage at VDIFF swings
below 90% of the DAC setting or above 2.1V.
FS (Pin 22)
This pin has two functions. A resistor placed from FS to
ground sets the switching frequency. There is an inverse
relationship between the value of the resistor and the
switching frequency. This pin can also be used to disable the
controller. To disable the controller, pull this pin below 1V.
EN (Pin 23)
This is the threshold-sensitive enable input for the controller.
To enable the controller, pull this pin above 1.23V.
VCC (Pin 24)
Bias supply voltage for the controller. Connect this pin to a
5V power supply.
5