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®
Data Sheet
February 2003
ISL6560
FN9011.2
Microprocessor CORE Voltage Regulator
Two-Phase Buck PWM Controller
The ISL6560 two-phase current mode, PWM control IC
together with companion gate drivers, the HIP6601A,
HIP6602A, HIP6603A or HIP6604 and MOSFETs provides a
precision voltage regulation system for advanced
microprocessors. Two-phase power conversion is a marked
departure from earlier single phase converter configurations
previously employed to satisfy the ever increasing current
demands of modern microprocessors. Multi-phase
converters, by distributing the power and load current,
results in smaller and lower cost transistors with fewer input
and output capacitors. These reductions accrue from the
higher effective conversion frequency with higher frequency
ripple current due to the phase interleaving process of this
topology. For example, a two phase converter operating at
350kHz per phase will have a ripple frequency of 700kHz.
Higher converter bandwidth is also achievable, resulting in
faster response to load transients.
An outstanding feature of this controller IC includes high-
side current sensing with a single current sampling resistor
in the input line to the output MOSFET transistors. This
single current sampling resistor monitors each channels
input current assuring excellent current sharing. Current
mode control results in rapid response to changing load
demands.
Also featured are programmable VID codes with an
accuracy of ±0.8% that range from 1.100–1.850V, and are
set by the microprocessor. Pull up currents on these VID
pins eliminates the need for external pull-up resistors.
Another feature of this controller IC is the PWRGD monitor
circuit and load protection circuits which provide overvoltage
protection, overcurrent protection and undervoltage
indication.
Features
• Two-phase power conversion
• Precision channel current sharing
• Precision CORE voltage regulation
- ±0.8% accuracy
• Microprocessor voltage identification input
- VRM 9.0 compliant
- 5-bit VID input
- 1.100 to 1.850V in 25mV steps
- Programmable “droop” voltage
• Fast transient recovery time
• Overcurrent protection
• High output ripple frequency. . . . . . . . . . . . . 100kHz to 2MHz
Applications
• VRM9.X modules
• AMD Athlon™ processor voltage regulator
• Low output voltage, high current DC/DC converters
Related Literature
• Technical Brief TB363 Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
Ordering Information
PART NUMBER TEMP. (oC) PACKAGE PKG. NO.
ISL6560CB
0 to 70 16 Ld SOIC M16.15
ISL6560CB-T
16 Ld SOIC Tape and Reel
ISL6560/62EVAL1 Evaluation Platform
Pinout
ISL6560 (SOIC)
TOP VIEW
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
CT 8
16 VCC
15 REF
14 CS-
13 PWM1
12 PWM2
11 CS+
10 PWRGD
9 GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Athlon™ is a trademark of Advanced Micro Devices, Inc. | Copyright © Intersil Americas Inc. 2003, All Rights Reserved

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ISL6560
Block Diagram
REF
VCC
PWRGD
VID4
VID3
VID2
VID1
VID0
FB
COMP
D/A
3V REFERENCE
X 0.82
X1.24
+-
UV
+
-
OVP
E/A
+
-
UVLO and
BIAS CIRCUITS
OSCILLATOR
CONTROL
LOGIC
CMP
+
-
CT
PWM1
PWM2
CS+
CS-
GND
Simplified Power System Diagram
FB
ISL6560
PWM 1
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
PWM 2 SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
VID
MICROPROCESSOR
Functional Pin Description
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
CT 8
16 VCC
15 REF
14 CS-
13 PWM1
12 PWM2
11 CS+
10 PWRGD
9 GND
VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4)
and VID0 (Pin 5)
Voltage Identification inputs from microprocessor. These pins
respond to TTL and 3.3V logic signals. The ISL6560 decodes
VID bits to establish the output voltage. See Table 1.
COMP (Pin 6)
Output of the internal transconductance error amplifier.
Voltage at this pin sets the output current level of the current
sense comparator. Pulling this pin to ground disables the
oscillator and drives both PWM outputs low.
FB (Pin 7)
Inverting input of the internal transconductance error
amplifier.
CT (Pin 8)
A capacitor on this pin sets the frequency of the internal
oscillator.
GND (Pin 9)
All signals are referenced to this bias and reference ground pin.
PWRGD (Pin 10)
This pin is an internal open drain connection. A high voltage
level at this pin with a resistor connected to this pin and VCC
indicates that CORE voltage is at the proper level,
CS+ (Pin 11) and CS- (Pin 14)
These inputs monitor the supply current to the upper
MOSFETs. CS+ is connected directly to the decoupled
supply voltage and current sensing resistor. CS- is
connected to the other end of the current sensing resistor
and the upper MOSFET drains.
PWM2 (Pin 12) and PWM1 (Pin 13)
PWM outputs that are connected to the gate driver ICs.
REF (Pin 15)
Three volt supply used to bias the output of the
transconductance amplifier.
VCC (Pin 16)
Connect this bias supply pin to a 12V supply.
2

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ISL6560
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 15V
CS+. CS- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
PWRGD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC
All Other Inputs and Outputs . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5V
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Maximum Operating Junction Temperature. . . . . . . . . . . . . . 125oC
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V ±10%
Thermal Information
Thermal Resistance (Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER
SYMBOL
TEST CONDITIONS
VCC SUPPLY CURRENT
Input Supply Current
Input Supply Current, UVLO Mode
Undervoltage Lock Out Voltage
Undervoltage Lock Out Hysteresis
ICC
ICC(UVLO)
VUVLO
VCC = 12V
VCC VUVLO, VCC Rising
DAC and REFERENCE VOLTAGES
Minimum DAC Programed Voltage
Middle DAC Programed Voltage
Maximum DAC Programed Voltage
Line Regulation
Crowbar Trip Point at FB Input
Crowbar Reset Point at FB Input
Crowbar Response Time
Reference Voltage
Output Current
VID INPUTS
VFB DAC Programmed to 1.100V
VFB DAC Programmed to 1.475V
VFB DAC Programmed to 1.850V
VFB
VCC = 10V to 14V
VCROWBAR Percent of Nominal DAC Voltage
VCROWBAR Percent of Nominal DAC Voltage
ICROWBAR Overvoltage to PWM Going Low
VREF
0mA IREF 1mA
IREF
Input Low Voltage
Input High Voltage
VID Pull-Up
Internal Pull-Up Voltage
VIL(VID)
VIH(VID)
IVID
VIDx = 0V or VIDx = 3V
OSCILLATOR
Maximum Frequency
Frequency Variation
CT Charging Current
CT Charging Current
ERROR AMPLIFIER
fCT(MAX)
fCT
ICT
ICT
TA = 25oC, CT = 91pF
TA = 25oC, VFB in Regulation
TA = 25oC, VFB = 0V
Output Resistance
Transconductance
Output Current
RO(ERR)
gm(ERR)
Io(ERR)
FB Forced to VOUT - 3%
MIN TYP MAX UNITS
- 5.8 9.0 mA
- 5.7 8.9 mA
5.4 6.4 6.9
V
0.1 0.4 0.8
V
1.091
1.463
1.835
-
114
50
-
2.952
1
1.100
1.475
1.850
0.05
124
60
300
3.000
3
1.109
1.487
1.865
-
134
70
-
3.048
-
V
V
V
%
%
%
ns
V
mA
- - 0.6 V
2.2 - - V
10 20 40 µA
4.5 5.0 5.5
V
2.0 -
- MHz
430 500 570 kHz
130 150 170
µA
26 36 46 µA
- 200 -
k
2.0 2.2 2.4 mS
- 1 - mA
3

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ISL6560
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER
SYMBOL
TEST CONDITIONS
Input Bias Current
Maximum Output Voltage
Output Disable Threshold
FB Low Foldback Threshold
-3dB Bandwidth
CURRENT SENSE
IFB
VCOMP(MAX) FB Forced to VOUT - 3%
VCOMP(OFF)
VFB(LOW)
BWERR COMP = Open
Threshold Voltage
Current Limit Foldback Voltage
VCOMP/VCS
Input Bias Current
Response Time
POWER GOOD COMPARATOR
VCS(TH)
VCS(FOLD)
ni
ICS+, ICS-
tCS
CS+ = VCC, FB Forced to VOUT - 3%
0.8 COMP 1V
FB 375mV
1 V VCOMP ≤ 3V
CS+ = CS- = VCC
CS+ - (CS-) 172mV to PWM Going Low
Undervoltage Threshold
Overvoltage Threshold
Output Voltage Low
Response Time
VPWRGD(UV) Percent of Nominal Output
VPWRGD(OV) Percent of Nominal Output
VOL(PWRGD) IPWRGD(SINK) = 100µA
FB Going High
Response Time
FB Going Low
PWM OUTPUTS
Output Voltage Low
Output Voltage High
Output Current
Duty Cycle Limit, by Design
VOL(PWM)
VOH(PWM)
IPWM
DMAX
IPWM(SINK) = 400µA
IPWM(SOURCE) = 400µA
Per Phase, Relative to fCT
MIN TYP MAX UNITS
- 5 100 nA
- 3.0 -
V
560 720 800 mV
375 425 500 mV
- 500 - kHz
142 157 172
- 0 15
75 95 115
- 12.5 -
- 0.5 5.0
- 50 -
mV
mV
mV
V/V
µA
ns
76 82 88
%
114 124 134
%
- 30 200 mV
- 2 - µs
- 200 -
ns
- 100 500 mV
4.5 5.0 5.5
V
0.4 1
- mA
- - 50 %
. TABLE 1. VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0 VDAC
1 1 1 1 1 Off
1 1 1 1 0 1.100
1 1 1 0 1 1.125
1 1 1 0 0 1.150
1 1 0 1 1 1.175
1 1 0 1 0 1.200
1 1 0 0 1 1.225
1 1 0 0 0 1.250
1 0 1 1 1 1.275
1 0 1 1 0 1.300
1 0 1 0 1 1.325
1 0 1 0 0 1.350
1 0 0 1 1 1.375
1 0 0 1 0 1.400
1 0 0 0 1 1.425
1 0 0 0 0 1.450
0 1 1 1 1 1.475
0 1 1 1 0 1.500
TABLE 1. VOLTAGE IDENTIFICATION CODES (Continued)
VID4
VID3
VID2
VID1
VID0 VDAC
0 1 1 0 1 1.525
0 1 1 0 0 1.550
0 1 0 1 1 1.575
0 1 0 1 0 1.600
0 1 0 0 1 1.625
0 1 0 0 0 1.650
0 0 1 1 1 1.675
0 0 1 1 0 1.700
0 0 1 0 1 1.725
0 0 1 0 0 1.750
0 0 0 1 1 1.775
0 0 0 1 0 1.800
0 0 0 0 1 1.825
0 0 0 0 0 1.850
4

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ISL6560
General Circuit Description
RSENSE
INPUT
VOLTAGE
CS+
CS-
+Current -
Comparator
ISL6560
OUTPUT
GATE
DRIVERS
and
Logic
RESET
SET
OSCILLATOR
GATE DRIVER
and
OUTPUT FETs
PWM1
GATE DRIVER
and
OUTPUT FETs
PWM2
CT
+
VCORE
COMP
RL
REF
gm -
Error
Amplifier
+
Reference
Voltage
FB
VID4
VID3
D/A VID2
VID1
VID0
GND
FIGURE 1. FUNCTIONAL SYSTEM BLOCK DIAGRAM SHOWING MAJOR COMPONENTS
The ISL6560 is a two-power channel, current mode PWM
controller with input current sensing. A transconductance
error amplifier helps establish the desired droop voltage for
microprocessor power supplies and will be explained later.
Figure 1 is a functional system block diagram of the IC in a
power supply application. A single current sampling resistor,
RSENSE, on the input side of the supply monitors the current
for both channels via a comparator within the ISL6560. A
single comparator insures that both channels are monitored
by the same circuitry, helping to balance the operating
current of each channel. During normal operation the
comparator is tripped by the peak inductor current,
terminating the conduction cycle. As more current is needed
to supply the output load, the comparator threshold voltage
is increased, increasing the inductor current to
accommodate the increased load demands.
by the amplifier attempting to make both inputs equal. This
does not happen because of the limited loop gain and
provides the bases for droop compensation mentioned
earlier and described below.
3.0
2.5
2.0 12.5V/V
1.5
1.0
{
0.5
Output
Disable
Threshold
0
0
20 40
60 80 100 120 140 160
VCS(CL) (mV)
Circuit Operation
Figure 1 will be used to describes operation of the controller.
A transconductance error amplifier provides the major
voltage control function. The error amplifier’s positive input is
connected to an internal DAC that is programmed via a 5-bit
code from the microprocessor. Regulation is accomplished
FIGURE 2. CURRENT COMPARATOR THRESHOLD
VOLTAGE AS A FUNCTION OF VCOMP
Figure 2 shows a curve of the current comparator threshold
voltage as a function of the error amplifier output voltage,
VCOMP. From this curve, it can be seen that as VCOMP
5