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®
PRELIMINARY
Data Sheet
December 2003
ISL6608
FN9140
Synchronous Rectified MOSFET Driver
The ISL6608 is a high frequency, MOSFET driver optimized
to drive two N-Channel power MOSFETs in a synchronous-
rectified buck converter topology. This driver combined with
an Intersil HIP63xx or ISL65xx Multi-Phase Buck PWM
controller forms a complete single-stage core-voltage
regulator solution with high efficiency performance at high
switching frequency for advanced microprocessors.
The IC is biased by a single low voltage supply (5V) and
minimizes low driver switching losses for high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3000pF load with a low
propagation delay and less than 10ns transition time. This
product implements bootstrapping on the upper gate with an
internal bootstrap Schottky diode, reducing implementation
cost, complexity, and allowing the use of higher
performance, cost effective N-Channel MOSFETs. Adaptive
shoot-through protection is integrated to prevent both
MOSFETs from conducting simultaneously.
The ISL6608 features 4A sink current for the lower gate
driver, which is capable of holding the lower MOSFET gate
during the Phase node rising edge to prevent shoot-through
power loss caused by the high dv/dt of the Phase node.
The ISL6608 also features a Three-State PWM input that,
working together with Intersil multi-phase PWM controllers,
will prevent a negative transient on the output voltage when
the output is being shut down. This feature eliminates the
Schottky diode that is usually seen in a microprocessor
power system for protecting the microprocessor from
reversed-output-voltage damage.
A diode emulation feature is integrated in the ISL6608 to
enhance converter efficiency at light load conditions. Diode
emulation also prevents a negative transient when starting
up with a pre-biased voltage on the output. When diode
emulation is enabled, the driver will allow discontinuous
conduction mode by detecting when the inductor current
reaches zero and subsequently turn off the low side
MOSFET, which will prevent the output from sinking current
and producing a negative transient on a pre-biased output
voltage (see Figures 6 and 7 on page 6).
Features
• Dual MOSFET Drives for Synchronous Rectified Bridge
• Adaptive Shoot-Through Protection
• 0.5On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency up to 2MHz
- Fast Output Rise and Fall Time
- Low Propagation Delay
• Three-State PWM Input for Power Stage Shutdown
• Internal Bootstrap Schottky Diode
• Low Bias Supply Current (5V, 80µA)
• Diode Emulation for Enhanced Light Load Efficiency and
Pre-Biased Startup Applications
• VCC POR (Power-On-Reset) Feature Integrated
• Low Three-State Shutdown Holdoff Time (Typical 160ns)
• Pin-to-pin Compatible with ISL6605
• QFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves
PCB Efficiency and Has a Thinner Profile
- Enhanced Thermal Performance
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile DC-DC Converters
• High Current Low Voltage DC-DC Converters
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for MLFP Packages”
Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE
PKG.
DWG. #
ISL6608CB
0 to 70
8 Ld SOIC
M8.15
ISL6608CB-T
8 Ld SOIC Tape and Reel
ISL6608CR
0 to 70
8 Ld 3x3 QFN L8.3x3
ISL6608CR-T
8 Ld 3x3 QFN Tape and Reel
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Pinouts
ISL6608CB (SOIC)
TOP VIEW
UGATE 1
BOOT 2
PWM 3
GND 4
8 PHASE
7 FCCM
6 VCC
5 LGATE
ISL6608
ISL6608CR (QFN)
TOP VIEW
87
BOOT 1
PWM 2
66 FCCM
5 VCC
34
Block Diagram
ISL6608
VCC
FCCM
PWM
CONTROL
LOGIC
10K
SHOOT-
THROUGH
PROTECTION
VCC
BOOT
UGATE
PHASE
LGATE
GND
THERMAL PAD (FOR QFN PACKAGE ONLY)
2

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ISL6608
Typical Application - Multi-Phase Converter Using ISL6608 Gate Drivers
+5V
PGOOD
VID
+5V
FB COMP
VCC
VSEN
PWM1
PWM2
FCCM
MAIN
CONTROL
ISEN1
ISEN2
FS DACOUT
GND
+5V
VCC
BOOT
FCCM
PWM DRIVE
ISL6608
UGATE
PHASE
THERMAL LGATE
PAD
VBAT
+5V
VCC
BOOT
FCCM
PWM
DRIVE
ISL6608
UGATE
PHASE
THERMAL LGATE
PAD
VBAT
+VCORE
3

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ISL6608
ti
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
BOOT Voltage (VBOOT). . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 22V
Phase Voltage (VPHASE) (Note 1). . . VBOOT - 7V to VBOOT + 0.3V
Input Voltage (VDE, VPWM) . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
UGATE. . . . . . . . . . . . . . . . . . . . . . VPHASE - 0.3V to VBOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
Ambient Temperature Range. . . . . . . . . . . . . . . . . . -40oC to 125oC
Thermal Information
Thermal Resistance (Typical, Notes 2, 3, 4)θJA (oC/W) θJC (oC/W)
SOIC Package (Note 2) . . . . . . . . . . . . 110
n/a
QFN Package (Notes 3, 4). . . . . . . . . .
95
36
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Maximum Operating Junction Temperature. . . . . . . . . . . . . . 125oC
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The Phase Voltage is capable of withstanding -7V when the BOOT pin is at GND.
2. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
4. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
5. Guaranteed by design, not tested.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER
SYMBOL
TEST CONDITIONS
VCC SUPPLY CURRENT
Bias Supply Current
POWER-ON RESET (POR)
IVCC
PWM Pin Floating, VVCC = 5V
VCC Rising
VCC Falling
Hysteresis
BOOTSTRAP DIODE
Forward Voltage
PWM INPUT
VF VVCC = 5V, IF = 2mA
Input Current
IPWM
VPWM = 5V
VPWM = 0V
PWM Three-State Rising Threshold
VVCC = 5V
PWM Three-State Falling Threshold
Three-State Shutdown Holdoff Time
tTSSHD
VVCC = 5V
VVCC = 5V, Ta = 25oC
FORCED CONTINUOUS CONDUCTION MODE (FCCM) INPUT
FCCM LOW Threshold
FCCM HIGH Threshold
SWITCHING TIME
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
tRU VVCC = 5V, 3nF Load
tRL VVCC = 5V, 3nF Load
tFU VVCC = 5V, 3nF Load
tFL VVCC = 5V, 3nF Load
MIN TYP MAX UNITS
- 80 - µA
-
2.40
-
3.40
2.90
500
3.90
-
-
V
V
mV
0.40 0.52 0.60
V
- 250 -
- -250 -
0.80 1.00 1.20
3.4 3.65 3.9
100 160 250
µA
µA
V
V
ns
0.50 - - V
- - 2.0 V
- 8.0 -
- 8.0 -
- 8.0 -
- 4.0 -
ns
ns
ns
ns
4

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ISL6608
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
UGATE Turn-Off Propagation Delay
LGATE Turn-Off Propagation Delay
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
UG/LG Three-state Propagation Delay
Minimum LG On TIME in DCM (Note 5)
OUTPUT
tPDLU
tPDLL
tPDHU
tPDHL
tPTS
tLGMIN
VVCC = 5V, Outputs Unloaded
VVCC = 5V, Outputs Unloaded
VVCC = 5V, Outputs Unloaded
VVCC = 5V, Outputs Unloaded
VVCC = 5V, Outputs Unloaded
- 35 -
- 35 -
- 20 -
- 20 -
- 35 -
- 400 -
ns
ns
ns
ns
ns
ns
Upper Drive Source Resistance
Upper Driver Source Current (Note 5)
Upper Drive Sink Resistance
Upper Driver Sink Current (Note 5)
Lower Drive Source Resistance
Lower Driver Source Current (Note 5)
Lower Drive Sink Resistance
Lower Driver Sink Current (Note 5)
RU 500mA Source Current
IU VUGATE-PHASE = 2.5V
RU 500mA Sink Current
IU VUGATE-PHASE = 2.5V
RL 500mA Source Current
IL VLGATE = 2.5V
RL 500mA Sink Current
IL VLGATE = 2.5V
- 1 2.5
- 2.00 -
Α
- 1 2.5
- 2.00 -
Α
- 1 2.5
- 2.00 -
Α
- 0.5 1.0
- 4.00 -
Α
Functional Pin Description
UGATE (Pin 1 for SOIC-8, Pin 8 for QFN)
The UGATE pin is the upper gate drive output. Connect to
the gate of high-side power N-Channel MOSFET.
BOOT (Pin 2 for SOIC-8, Pin 1 for QFN)
BOOT is the floating bootstrap supply pin for the upper gate
drive. Connect the bootstrap capacitor between this pin and
the PHASE pin. The bootstrap capacitor provides the charge
to turn on the upper MOSFET. See the Bootstrap Diode and
Capacitor section under DESCRIPTION for guidance in
choosing the appropriate capacitor value.
PWM (Pin 3 for SOIC-8, Pin 2 for QFN)
The PWM signal is the control input for the driver. The PWM
signal can enter three distinct states during operation, see the
three-state PWM Input section under DESCRIPTION for further
details. Connect this pin to the PWM output of the controller.
GND (Pin 4 for SOIC-8, Pin 3 for QFN)
GND is the ground pin for the IC.
LGATE (Pin 5 for SOIC-8, Pin 4 for QFN)
LGATE is the lower gate drive output. Connect to gate of the
low-side power N-Channel MOSFET.
VCC (Pin 6 for SOIC-8, Pin 5 for QFN)
Connect the VCC pin to a +5V bias supply. Place a high
quality bypass capacitor from this pin to GND.
FCCM (Pin 7 for SOIC-8, Pin 6 for QFN)
The FCCM pin enables or disables Diode Emulation. When
FCCM is LOW, diode emulation is allowed. Otherwise,
continuous conduction mode is forced (FCCM= Forced
Continuous Conduction Mode). See the Diode Emulation
section under DESCRIPTION for more detail.
PHASE (Pin 8 for SOIC-8, Pin 7 for QFN)
Connect the PHASE pin to the source of the upper MOSFET
and the drain of the lower MOSFET. This pin provides a
return path for the upper gate driver.
Thermal Pad (in QFN only)
In the QFN package, the pad underneath the center of the
IC is a thermal substrate. The PCB “thermal land” design
for this exposed die pad should include thermal vias that
drop down and connect to one or more buried copper
plane(s). This combination of vias for vertical heat escape
and buried planes for heat spreading allows the QFN to
achieve its full thermal potential. This pad should be either
grounded or floating, and it should not be connected to
other nodes. Refer to TB389 for design guidelines.
5