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®
Data Sheet
August 2003
ISL6721
FN9110.1
Flexible Single Ended Current Mode PWM
Controller
The ISL6721 is a low power, single-ended pulse width
modulating (PWM) current mode controller designed for a
wide range of DC-DC conversion applications including
boost, flyback, and isolated output configurations. Peak
current mode control effectively handles power transients
and provides inherent over-current protection. Other
features include a low power mode where the supply current
drops to less than 200µA during over voltage and over
current shutdown faults.
This advanced BiCMOS design features low operating
current, adjustable operating frequency up to 1MHz,
adjustable soft-start, and a bi-directional SYNC signal that
allows the oscillator to be locked to an external clock for
noise sensitive applications.
Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE
PKG.
DWG. #
ISL6721AB
-40 to 105 16 Ld SOIC M16.15
ISL6721AV
-40 to 105 16 Ld TSSOP M16.173
Features
• 1A MOSFET Gate Driver
• 100µA Startup Current
• Fast Transient Response with Peak Current Mode Control
• Adjustable Switching Frequency up to 1MHz
• Bi-Directional Synchronization
• Low Power Disable Mode
• Delayed Restart from OV and OC Shutdown Faults
• Adjustable Slope Compensation
• Adjustable Soft Start
• Adjustable Over Current Shutdown Delay
• Adjustable UV and OV Monitors
• Leading Edge Blanking
• Integrated Thermal Shutdown
• 1% Tolerance voltage Reference
Applications
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
• Isolated Buck and Flyback Regulators
• Boost Regulators
Pinout
ISL6721 (SOIC, TSSOP)
TOP VIEW
GATE 1
ISENSE 2
SYNC 3
SLOPE 4
UV 5
OV 6
RTCT 7
ISET 8
16 VC
15 PGND
14 VCC
13 VREF
12 LGND
11 SS
10 COMP
9 FB
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

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ISL6721
Functional Block Diagram
VCC
LGND
ISET
ISENSE
5K
SLOPE
COMP
SS
VFB
START/STOP
UV COMPARATOR
+
-
BG +-
VREF
5.00 V
1%
ENABLE
THERMAL
PROTECTION
RESTART
DELAY
0.8
SS CHARGE
VOLTAGE CLAMP
SS CHARGED
SOFTSTART
CHARGE 70 µA
CURRENT
ON
OVERCURRENT
SHUTDOWN
DELAY
25 µA
+
-
4.375V
ON
VREF
53 µA
+
Σ
+
100mV
0.1
SS CLAMP
+
-
2.5V
ERROR
AMPLIFIER
+
-
- OC DETECT
+
OVERCURRENT
COMPARATOR
Q
Q
50 µS
RETRIGGERABLE
ONE SHOT
SQ
RQ
OC LATCH
SS LOW
-
+
FAULT
LATCH
SS LOW 270mV
COMPARATOR
SQ
PWM
COMPARATOR
+
-
1/3 100nS START
BLANKING
RQ
SET DOMINANT
VREF
UV COMPARATOR
4.65V -
+
BG
VREF
VREF
SS
15 µA
VREF
20K 3.0V
1.5V 12K
30K
RTCT
VREF
OSCILLATOR
COMPARATOR
-
+
1mA
ON
+
4V -
-
2V +
ON
Bi-Directional
Synchronization
OSC IN
CLK OUT
NO EXT SYNC
EXT SYNC BLANKING
SYNC IN
SYNC OUT
VREF
SQ
RQ
BLANKING
COMPARATOR
3.0V
-
+
+
-
2.50V
-
+
1.45V
36K
OV
UV
VC
GATE
PGND
SYNC
100
4.5K
2

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ISL6721
Typical Application - 48V Input Dual Output Flyback, 3.3V @ 2.5A, 1.8V @ 1.0A
VIN+ P9
36-75V
C1
V IN -
R1
R2
SYNC
R5
R6
Q3
VR1
R24
C2
C3
C18
CR6
TP1
Q1
T1
ISOLATION
XFMR
CR5
R21
SP1
SP2
C21
+ C15
C5 CR2
C17
CR4
C19 +
C22
+
C20
R16
R17
C6
R19
U2
C14
+ C16
+3.3V
+1.8V
R18
RETURN
R4 R3
R23
R25
Q2 C4
D1
TP3
TP5
D2
R22
TP2
U4
GATE
IS E N S E
SYNC
SLOPE
UV
OV
RTCT
ISET
VC
PGND
VCC
VREF
LGND
SS
COMP
VFB
R8
R10
C7 C8
R7
R11
R12
R9
R15
C13
U3
R20
R26
R27
R13
C9
R14
TP4
C12
C11
C10
3

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ISL6721
Absolute Maximum Ratings
Supply Voltage, VCC, VC . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
GATE . . . . . . . . . . . . . . . . GND - 0.3V to Gate Output Limit Voltage
PGND to LGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5.3V
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .1250V
Thermal Information
Thermal Resistance Junction to Ambient (Typical)
θJA (oC/W)
16 Lead SOIC (Note 1) . . . . . . . . . . . . . . . . . . . . . .
80
16 Lead TSSOP (Note 1) . . . . . . . . . . . . . . . . . . . . .
105
Maximum Junction Temperature . . . . . . . . . . . . . . . -55oC to 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC, TSSOP - Lead Tips Only)
Operating Conditions
Temperature Range
ISL6721Ax . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 105oC
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . . . 9-18 VDC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VCC = VC < 20V ±10%, Rt = 11k, Ct = 330 pF, TA = -40 to 105oC (Note 3), Typical values
are at TA = 25oC
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
UNDER VOLTAGE LOCKOUT
START Threshold
7.95 8.25 8.55
V
STOP Threshold
7.40 7.70 8.20
V
Hysteresis
0.50 0.55 1.00
V
Start-Up Current, ICC
OC/OV Fault Operating Current, ICC
Operating Current, ICC
Operating Supply Current, IC
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Fault Voltage
Vcc < START Threshold
Includes 1nF GATE loading
Line, load, 0 - 105oC
Line, load, -40 - 105oC
TA = 125oC, 1000 hours (Note 5)
-
-
-
-
4.95
4.90
-
4.50
100
200
4.5
8.0
5.00
5.00
5
4.65
175
300
10.0
12.0
5.05
5.05
-
4.75
µA
µA
mA
mA
V
mV
V
VREF Good Voltage
4.65 4.80 4.95
V
Hysteresis
75 165 250 mV
Operational Current
-10 -
- mA
Current Limit
-20 -
- mA
CURRENT SENSE
Input Impedance
- 5 - k
Offset Voltage
0.08 0.10 0.11
V
Input Voltage Range
0 - 1.5 V
Blanking Time
(Note 5)
30 60 100 ns
Gain, ACS
0.77 0.79 0.81
V/V
4

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ISL6721
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic.
are at TA =
92V5o<CVC(CCo=nVtinCu<ed20) V
±10%,
Rt
=
11k,
Ct
=
330
pF,
TA
=
-40
to
105oC
(Note
3),
Typical
values
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ERROR AMPLIFIER
Open Loop Voltage Gain
(Note 5)
60 90 - dB
Gain-Bandwidth Product
Reference Voltage Initial Accuracy
Reference Voltage
COMP to PWM Gain, ACOMP
COMP to PWM Offset
(Note 5)
VFB = COMP, TA = 25oC (Note 5)
VFB = COMP
COMP = 4V, TA = 25oC
COMP = 4V (Note 5)
-
2.465
2.44
0.31
0.51
15
2.515
2.515
0.33
0.75
-
2.565
2.590
0.35
0.88
MHz
V
V
V/V
V
FB Input Bias Current
COMP Sink Current
COMP Source Current
COMP VOH
COMP VOL
PSRR
VFB = 0V
COMP = 1.5V, VFB = 2.7V
COMP = 1.5V, VFB = 2.3V
VFB = 2.3V
VFB = 2.7V
Frequency = 120Hz (Note 5)
-2 0.1 2 µA
2 6 - mA
-0.2 -0.5 - mA
4.25 4.4
5.0
V
0.4 0.8 1.2
V
60 80 - dB
SS Clamp, VCOMP
OSCILLATOR
SS = 2.5V, VFB = 0V, ISET = 2V
2.4
2.5
2.6
V
Frequency Accuracy
Frequency Variation with VCC
Temperature Stability
T = 105oC (F20V- - F9V)/F9V
T = -40oC (F20V- - F9V)/F9V
(Note 5)
289 318 347 kHz
- 2 3%
23
- 8 -%
Minimum Charge and Discharge Time
(Note 5)
- TBD -
nS
Maximum Duty Cycle
(Note 6)
68 75 81 %
Comparator High Threshold - Free Running
(Note 5)
-3-V
Comparator High Threshold - with External SYNCH (Note 5)
-4-V
Comparator Low Threshold
Discharge Current
(Note 5)
0 - 105oC
-40 - 105oC
- 1.5 -
V
0.75 1.0 1.2 mA
0.70 1.0
1.2
SYNCHRONIZATION
Input High Threshold
- - 2.5 V
Input Pulse Width
25 -
- nS
Input Frequency Range
(Note 5)
0.65x Free
Running
-
1.0 MHz
Input Impedance
- 4.5 - k
VOH
VOL
SYNCH Advance
Output Pulse Width
RLOAD = 4.5k
2.5 - - V
RLOAD = open
- - 0.1 V
SYNCH rising edge to GATE falling
edge, CGATE = CSYNCH = 100pF
-
25 55 nS
CSYNCH = 100pF
50 -
- nS
5