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®
Data Sheet
July 25, 2005
ISL6801
FN9087.2
High Voltage Bootstrap High Side Driver
The ISL6801 is a single monolithic, inverting bootstrap
driver. Its floating Level Shifter Section is optimized for the
control of N-Channel Power MOSFETs in high side
configurations with Bus Voltages up to 120VDC from a 5V
Controller Output. It features two output stages pinned out
separately to allow independent control of rise and fall times.
To ensure static DC operation an integrated recharge path
charges the bootstrap cap while the driver is switched off. A
pull-up resistor forces the input low when no control signal is
applied. The supply voltage is monitored to guarantee
faultless operation at start-up.
Ordering Information
PART NUMBER
ISL6801AB
ISL6801AB-T
TEMP.
RANGE (oC)
PACKAGE
-40 to 125 8 Ld SOIC
-40 to 125 8 Ld SOIC Tape
and Reel
PKG.
DWG. #
M8.15
M8.15
Features
• Single Bootstrap High Side Driver
• Bootstrap Supply Max Voltage. . . . . . . . . . . . . . . 120VDC
• Peak Output Drive Current. . . . . . . . . . . . . . . . . . . 200mA
• Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . 100kHz
• Active Low Input
• Separate Reset Input
• Recharge Path for Static Operation
• Separate High and Low Gate Drive Outputs Allow
Independent Turn ON/OFF Time Control
• Supply Undervoltage Protection
• Space Saving SO-8 Package
• Wide Operating Temperature Range
Applications
• Driver for N-Channel MOSFETs in High Side
Configurations that Control Ground Referenced Loads
• Drives Solenoids, Motors, Relays and Lamps in
Automotive Applications
Pinout
SL6801AB (SOIC)
TOP VIEW
VCC 1
IN 2
GND 3
RES 4
8 VB
7 HOH
6 HOL
5 VS
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Typical Application Block Diagram
ISL6801
BOOTSTRAP SUPPLY
VCC
VB
CONTROLLER
IN
RES
ISL6801
LEVEL
SHIFTER
RECHARGE
PATH
HOH
HOL
VS
+150VDC MAX
LOAD
Functional Block Diagram
VCC
IN
RES
GND
UV
DETECT
&
&
LEVEL
SHIFTER
ON
DELAY
OFF
OUTPUT
VB
HOH
HOL
VS
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
SYMBOL
VCC
IN
GND
RES
VS
HOL
DESCRIPTION
Driver Supply, Typical 5.0V
Driver Control Signal Input
Ground
Driver Enable Signal Input (‘RESET’)
MOSFET Source Connection
MOSFET Gate Low Connection
7
HOH
MOSFET Gate High Connection
8 VB Driver Output Stage Supply
NOTE:
The HOL and HOH are the low respective high gate drive output pins. The turn on and turn off time of the external MOSFET could be controlled by
using different resistance values for high and low signal.
2

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ISL6801
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16V
Driver Output Stage Voltage, VB (Referred to GND) . . . . . . . . .130V
Source Reference Voltage, VS
(-5V for 0.5ms, MOSFET Off). . . . . . . . . . . . . . . . . . . . (Min) -1.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (Max) 120V
ESD Rating, VESD
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . (Min) 820V
(Per MIL-STD-883 Method 3015.7)
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . -55oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .245oC
(SOIC Lead Tips Only)
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 125oC
Supply Voltage Range (Max) . . . . . . . . . . . . . . . . . . . . 4.5V to 6.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications All values are over full temperature range.
PARAMETER
SYMBOL
TEST CONDITIONS
Operating Temperature Range
Source Reference Voltage
Supply Voltage (Note 2)
Driver Output Supply
Switching Frequency
TA
VS
VCC
VVB - VS
VVB - GND
f
-1.8V Continuous, VB/VOH must stay
low, IN = 0V, RES = 5V, VCC = 4.5V and
6.5V, VB = 5V and 12V,
(Load R = 50, C = 6.8nF)
TA = -40 to 125oC
Ident. to VGS of MOSFET Device
Functional
Guaranteed by Design
Voltage Transconductance (Note 3)
dVs/dt
Peak Gate Drive Current
IHOpeak
Sink/Source Current VB = 5V and 16V,
100ns
Continuous Gate Drive Current (Note 3)
Gate Drive Level LOW
Gate Drive Level LOW
Gate Drive Level HIGH
Gate Drive Level HIGH
Total IN to Output Delay (Figure 1)
IHOcont
VHOL, VS
VHOL, VS
VVB, HOH
VVB, HOH
tdIN-HOH, L
Sink/Source Current Continuous
IN at H, IHO = 1mA, VB-VS = 5V and 16V
IN at H, IHO = 100mA
IN at L, IHO = 1mA, VB-VS = 5V and 16V
IN at L, IHO = 100mA
at VCC = 5.0V, RES = 5V,
Output Trigger Level: 3.5V ON at
VB = 5V, 1.0V OFF at VB = 16V,
Input 2.5V (Load R = 50, C = 6.8nF)
Total RES to Output Delay (Figure 2)
tdRES - HOH, L VB-VS = 5V and 16V,
(Load R = 50, C = 6.8nF)
Output Rise/Fall Times
tHOH, L
Fall/Rise
VB-VS = 5V
(Load R = 50, C = 6.8nF)
VB-VS = 16V
VB Drop Voltage (Figure 4, Note 4)
VBDROP
VB-VS = 9.0V, C100 = 1µF,
(Load R = 50, C = 6.8nF)
MIN
-40
-1.5
4.5
4.0
2.0
100
-
-
6.5
-
-
-
-
-
-
-
-
-
TYP MAX UNITS
- 125 oC
- 120 V
- 6.5 V
8.5 16.0
V
- -V
- - kHz
- 500 V/µs
200 - mA
8 - mA
- 0.3 V
- 2.2 V
- 0.5 V
- 2.2 V
1.0 3.0 µs
1.0 3.0 µs
100 500
ns
200 500
ns
100 210 mV
(Note 5)
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ISL6801
Electrical Specifications All values are over full temperature range. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
VB Input Current (Note 6)
IVB Static Current, VB-VS = 8.5V,
300 750 875
µA
VCC = 5V, IN = 0V,
RES = 5V, (Load R = 50, C = 6.8nF)
VB Input Current
IVB Static Current, VB-VS = 8.5V,
100 550 700
µA
VCC = 5V, IN = 0V,
RES = 0V, (Load R = 50, C = 6.8nF)
Driver Supply Current
IVCC
at VCC = 4.5V and 6.5V
(Load R = 50, C = 6.8nF)
- 1.2 2.5 mA
Input Threshold LOW (Note 7)
Input Threshold HIGH (Note 7)
Enable Threshold LOW (Note 7)
Enable Threshold HIGH (Note 7)
Input Impedance at IN
INLOW
INHIGH
RESLOW
RESHIGH
RIN
VCC = 4.5V and 6.5V
VCC = 4.5V and 6.5V
VCC = 4.5V and 6.5V
VCC = 4.5V and 6.5V
at VCC = 5.0V, RES = 5V, IN = 0V,
VB = 12V
1.4 - - V
- - 3.0 V
1.4 - - V
- - 3.0 V
60 100 170 k
Input Impedance at RES
RRES
at VCC = 5.0V, RES = 5V, IN = 0V,
VB = 12V
60 100 170 k
Logic Input Current at RES (Note 8)
Undervoltage Shutdown Threshold
Recharge Resistance (Note 9)
Recharge Turn On Delay (Note 9)
Recharge Turn Off Delay
Recharge Path Voltage Drop
IRES
at Logic LOW Response HIGH
-0.1 - 1.0 mA
VUV
VCC to GND, Incl. Hyst.
- 3.5 -
V
Rrecharge
VB = VS = HOH = HOL = 7V, RES = 5V,
IN = 5V, VCC = 4.5V and 6V
70
170 350
tRechargeON
7 10 15 µs
tRechargeOFF
- - 1.5 µs
Vdrop
Recharge
at a Constant Current of 1.0mA
at a Constant Current of 10mA
- - 0.8 V
- - 3.5 V
NOTES:
2. Shutdown between 3.5V and 4.5V.
3. Parametric limits are guaranteed by design, but not tested in production.
4. The drop voltage is caused by VB to VS current flow during switching. See Figure 3.
5. Assuming 3µs switching overlap, time delay use at testing 100µs.
6. External MOSFET ON or OFF.
7. Input and Enable thresholds tested at VCC = 4.5V and 6.5V, VB = 12V, VS = 0V, IN at 0V, Response RES at 5.0V.
8. The defined values are to be considered as a maximum allowed value. The input stage does not need to have sink or source capability.
9. The recharge path has to withstand transients in the 120V range for approximately 1µs while injector turn off, causing high power dissipation in
the resistor.
4

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Timing Diagrams
ISL6801
IN
RES
VS
HOH, L
tdIN-HOH, L
RECHARGE
OFF
tRechargeOFF
tdIN-HOH, L
ON
tRechargeON
90%
10%
tHOH, Lrise
FIGURE 1. INPUT/OUTPUT TIMING DIAGRAM
90%
10%
tHOH, Lfall
VB Drop Voltage Test
IN
RES
HOH, L
tdRES-HOH, L
tdRES-HOH, L
FIGURE 2. RESET TIMING DIAGRAM
Ig
1 VCC
VB 8
50R
IN
2 IN
HOH 7
50R 1µ
3 GND HOL 6
4 RES
VS 5
ISL6801
6n8
FIGURE 3. VB DROP VOLTAGE TEST CIRCUIT
Ig
IN
RES
7V
OFF
VBDROP
VB-VS BREAK BEFORE MAKE
0A
FIGURE 4. VB DROP VOLTAGE DIAGRAM
5