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® INA105
Precision Unity Gain
DIFFERENTIAL AMPLIFIER
FEATURES
q CMR 86dB min OVER TEMPERATURE
q GAIN ERROR: 0.01% max
q NONLINEARITY: 0.001% max
q NO EXTERNAL ADJUSTMENTS
REQUIRED
q EASY TO USE
q COMPLETE SOLUTION
q HIGHLY VERSATILE
q LOW COST
q PLASTIC DIP, TO-99 HERMETIC METAL,
AND SO-8 SOIC PACKAGES
DESCRIPTION
The INA105 is a monolithic Gain = 1 differential
amplifier consisting of a precision op amp and on-chip
metal film resistors. The resistors are laser trimmed
for accurate gain and high common-mode rejection.
Excellent TCR tracking of the resistors maintains
gain accuracy and common-mode rejection over
temperature.
The differential amplifier is the foundation of many
commonly used circuits. The INA105 provides this
precision circuit function without using an expensive
precision resistor network. The INA105 is available in
8-pin plastic DIP, SO-8 surface-mount and TO-99
metal packages.
APPLICATIONS
q DIFFERENTIAL AMPLIFIER
q INSTRUMENTATION AMPLIFIER
BUILDING BLOCK
q UNITY-GAIN INVERTING AMPLIFIER
q GAIN-OF-1/2 AMPLIFIER
q NONINVERTING GAIN-OF-2 AMPLIFIER
q AVERAGE VALUE AMPLIFIER
q ABSOLUTE VALUE AMPLIFIER
q SUMMING AMPLIFIER
q SYNCHRONOUS DEMODULATOR
q CURRENT RECEIVER WITH COMPLIANCE
TO RAILS
q 4mA TO 20mA TRANSMITTER
q VOLTAGE-CONTROLLED CURRENT
SOURCE
q ALL-PASS FILTERS
–In 2
25k
+In 3
25k
25k
25k
5 Sense
7 V+
6 Output
4 V–
1 Ref
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1985 Burr-Brown Corporation
PDS-617G
Printed in U.S.A. August, 1993

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SPECIFICATIONS
ELECTRICAL
At +25°C, VCC = ±15V, unless otherwise noted.
PARAMETER
CONDITIONS
INA105AM
MIN TYP MAX
INA105BM
MIN TYP MAX
INA105KP, KU
MIN TYP MAX
UNITS
GAIN
Initial(1)
Error
vs Temperature
Nonlinearity(2)
1
0.005
1
0.0002
0.01
5
0.001
T
TT
TT
TT
T V/V
0.01 0.025
%
T T ppm/°C
TT
%
OUTPUT
Rated Voltage
Rated Current
Impedance
Current Limit
Capacitive Load
IO = +20mA, –5mA
VO = 10V
To Common
Stable Operation
10
+20, –5
12
0.01
+40/–10
1000
TT
T
T
T
T
TT
T
T
T
T
V
mA
mA
pF
INPUT
Impedance(3)
Voltage Range(4)
Common-Mode Rejection(5)
Differential
Common-Mode
Differential
Common-Mode
TA = TMIN to TMAX
±10
±20
80
50
50
90
T
T
T
T
86 100
T
T
T
T
72 T
k
k
V
V
dB
OFFSET VOLTAGE
Initial
vs Temperature
vs Supply
vs Time
RTO(6), (7)
±VS = 6V to 18V
50 250
5 20
1 25
20
TT
5 10
T 15
T
T 500
µV
T T µV/°C
T T µV/V
T µV/mo
OUTPUT NOISE VOLTAGE
fB = 0.01Hz to 10Hz
fO = 10kHz
RTO(6), (8)
2.4
60
T
T
T µVp-p
T nV/Hz
DYNAMIC RESPONSE
Small Signal Bandwidth
Full Power Bandwidth
Slew Rate
Settling Time: 0.1%
0.01%
0.01%
–3dB
VO = 20Vp-p
30
2
VO = 10V Step
VO = 10V Step
VCM = 10V Step, VDIFF = 0V
1
50
3
4
5
1.5
T
TT
TT
T
T
T
T
TT
TT
T
T
T
MHz
kHz
V/µs
µs
µs
µs
POWER SUPPLY
Rated
Voltage Range
Quiescent Current
±15 T
TV
Derated Performance ±5
±18 T
TT
TV
VO = 0V
±1.5
±2
TT
T T mA
TEMPERATURE RANGE
Specification
Operation
Storage
–40 +85 T
–55
+125
T
–65
+150
T
TT
T –40
T –40
T
+85
+125
°C
°C
°C
T Specification same as for INA105AM.
NOTES: (1) Connected as difference amplifier (see Figure 4). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peak-
to-peak output. (3) 25kresistors are ratio matched but have ±20% absolute value. (4) Maximum input voltage without protection is 10V more than either ±15V supply
(±25V). Limit IIN to 1mA. (5) With zero source impedance (see “Maintaining CMR” section). (6) Referred to output in unity-gain difference configuration. Note that this
circuit has a gain of 2 for the operational amplifier’s offset voltage and noise voltage. (7) Includes effects of amplifier’s input bias and offset currents. (8) Includes effects
of amplifier’s input current noise and thermal noise contribution of resistor network.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
INA105
2

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PIN CONFIGURATIONS
Top View
Ref
1
Tab
8
No Internal
Connection
V+
7
TO-99
–In 2
6 Output
35
+In Sense
4 INA105AM
V– INA105BM
Case internally connected to V–. Make no connection.
Top View
DIP/SOIC
Ref 1
(1)
–In 2
+In 3
V– 4
8 No Internal Connection
7 V+
6 Output
5 Sense
NOTE: (1) Performance grade identifier box for small outline surface mount.
Blank indicates K grade. Part is marked INA105U.
ABSOLUTE MAXIMUM RATINGS
Supply ................................................................................................ ±18V
Input Voltage Range ............................................................................ ±VS
Operating Temperature Range: M .................................. –55°C to +125°C
P, U ................................ –40°C to +85°C
Storage Temperature Range: M ..................................... –65°C to +150°C
P, U ................................. –40°C to +125°C
Lead Temperature (soldering, 10s) M, P ....................................... +300°C
Wave Soldering (3s, max) U .......................................................... +260°C
Output Short Circuit to Common .............................................. Continuous
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DRAWING TEMPERATURE
NUMBER(1)
RANGE
INA105AM
INA105BM
INA105KP
INA105KU
TO-99 Metal
TO-99 Metal
8-Pin Plastic DIP
8-Pin SOIC
001 –40°C to +85°C
001 –40°C to +85°C
006 –40°C to +85°C
182 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
®
3 INA105

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TYPICAL PERFORMANCE CURVES
At TA = 25°C, VS = ±15V, unless otherwise noted.
STEP RESPONSE
SMALL SIGNAL RESPONSE
(No Load)
+50
0
–50
0 4 8 12 16
Time (µs)
0 5 10
Time (µs)
SMALL SIGNAL RESPONSE
(RLOAD = ∞ Ω, CLOAD = 1000pF)
+50
0
–50
0 5 10
Time (µs)
17.5
15
12.5
10
7.5
5
2.5
0
0
MAXIMUM VOUT vs IOUT
(Positive Swing)
VS = ±18V
VS = ±15V
VS = ±12V
VS = ±5V
6 12 18 24 30 36
IOUT (mA)
–17.5
–15
–12.5
–10
–7.5
–5
–2.5
0
0
MAXIMUM VOUT vs IOUT
(Negative Swing)
VS = ±18V
VS = ±15V
VS = ±12V
VS = ±5V
–2 –4 –6 –8 –10 –12
–IOUT (mA)
110
100
90
80
70
60
10
CMR vs FREQUENCY
BM
AM, KP, U
100 1k 10k
Frequency (Hz)
100k
®
INA105
4

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TYPICAL PERFORMANCE CURVES (CONT)
At TA = 25°C, VS = ±15V, unless otherwise noted.
140
120
100
80
60
40
1
POWER SUPPLY REJECTION
vs FREQUENCY
V–
V+
10 100 1k 10k 100k
Frequency (Hz)
COMMON-MODE INPUT RANGE vs SUPPLY
(Difference Amplifier Connected, VOUT = 0)
36
30
24
Negative CMV
18
Positive CMV
12
6
0
±3 ±6 ±9 ±12 ±15 ±18 ±21
Supply Voltage (V)
APPLICATION INFORMATION
V– V+
Figure 1 shows the basic connections required for operation
of the INA105. Power supply bypass capacitors should be
connected close to the device pins.
The differential input signal is connected to pins 2 and 3 as
shown. The source impedances connected to the inputs must
be nearly equal to assure good common-mode rejection. A
5mismatch in source impedance will degrade the com-
mon-mode rejection of a typical device to approximately
80dB. If the source has a known mismatch in source imped-
ance, an additional resistor in series with one input can be
used to preserve good common-mode rejection.
The output is referred to the output reference terminal (pin
1) which is normally grounded. A voltage applied to the Ref
terminal will be summed with the output signal. This can be
used to null offset voltage as shown in Figure 2. The source
impedance of a signal applied to the Ref terminal should be
less than 10to maintain good common-mode rejection.
Do not interchange pins 1 and 3 or pins 2 and 5, even though
nominal resistor values are equal. These resistors are laser
trimmed for precise resistor ratios to achieve accurate gain
and highest CMR. Interchanging these pins would not pro-
vide specified performance.
1µF 1µF
2
V2
47
INA105
R1 R2
25k
25k
3
V3
R3
25k
5
6
R4
25k
VOUT = V3 – V2
1
FIGURE 1. Basic Power Supply and Signal Connections.
®
5 INA105