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S3C8639/C863A/P863A
1 PRODUCT OVERVIEW
PRODUCT OVERVIEW
SAM8 PRODUCT FAMILY
Samsung's SAM8 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU with a wide
range of integrated peripherals, in various mask-programmable ROM sizes. Analog its major CPU features are:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
The sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum of four CPU clocks) can be assigned
to specific interrupt levels.
S3C8639/C863A/P863A MICROCONTROLLERS
S3C8639/C863A/P863A single-chip 8-bit
microcontrollers are based on the powerful SAM8
CPU architecture. The internal register file is logically
expanded to increase the on-chip register space.
S3C8639/C863A/P863A contain 32/48 Kbytes of on-
chip program ROM.
In line with Samsung's modular design approach, the
following peripherals are integrated with the SAM8
core:
— Four programmable I/O ports (total 27 pins)
— One 8-bit basic timer for oscillation stabilization
and watchdog functions
— One 8-bit general-purpose timer/counter with
selectable clock sources
— One interval timer
— One 12-bit counter with selectable clock sources,
including Hsync or Csync input
— PWM block with seven 8-bit PWM circuits
— Sync processor block (for Vsync and Hsync I/O,
Csync input, and Clamp signal output)
— DDC Multi-master and slave-only IIC-Bus
— 4-channel A/D converter (8-bit resolution)
S3C8639/C863A/P863A are a versatile
microcontrollers which are ideal for use in multi-sync
monitors or in general-purpose applications that
require sophisticated timer/counter, PWM, sync
signal processing, A/D converter, and multi-master
IIC-bus support with DDC. They are available in a
42-pin SDIP or a 44-pin QFP package.
OTP
S3C8639/C863A microcontrollers are also available in OTP (One Time Programmable) version named,
S3P863A. S3P863A microcontroller has an on-chip 48-Kbyte one-time-programmable EPROM instead of
masked ROM. S3P863A is comparable to S3C8639/C863A, both in function and pin configuration except its
ROM size.
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PRODUCT OVERVIEW
S3C8639/C863A/P863A
FEATURES
CPU
SAM88RC CPU core
Memory
S3C8639: 32-Kbyte internal program memory
(ROM)
S3C863A: 48-Kbyte internal program memory
(ROM)
S3C8639: 784-byte general-purpose
register area
S3C863A: 1040-byte general-purpose
register area
Instruction Set
78 instructions
IDLE and STOP instructions added for
power-down modes
Instruction Execution Time
Minimum 333 ns (with 12 MHz CPU clock)
Interrupts
Ten interrupt sources/vectors
Eight interrupt level
Fast interrupt feature
General I/O
Four I/O Ports (total 27pins)
8-Bit Basic Timer
Programmable timer for oscillation stabilization
interval control or watchdog timer function
Three selective internal clock frequencies
Timer/Counters
One 8-bit Timer/Counter with several clock
sources (Capture mode)
One 12-bit Counter with H-/C-sync and several
clock sources
One Interval Timer
Low Voltage Reset (LVR)
LVR level is 2.4 V ± 200 mV
Pulse Width Modulator (PWM)
8-bit PWM: 7-CH
(6-bit basic frame with 2-bit extension)
Sync-Processor Block
Vsync-I, Hsync-I, Csync-I input and Vsync-O,
Hsync-O, Clamp-O output pins
Programmable Pseudo sync signal generation
Auto SOG detection
Auto H-/V-sync polarity detection
Composite sync detection
DDC Multi-Master IIC-Bus 1-Ch
Serial Peripheral Interface
Support for Display Data Channel
(DDC1/DDC2B/DDC2Bi/DDC2B+)
Slave Only IIC-Bus 1-Ch
Serial Peripheral Interface
A/D Converter
4-channel; 8-bit resolution
Oscillator Frequency
8 MHz to 12 MHz crystal operation
Internal Max. 12 MHz CPU clock
Operating Temperature Range
– 40 °C to + 85 °C
Operating Voltage Range
3.0 V to 5.5 V
Package Types
42-pin SDIP, 44-pin QFP
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S3C8639/C863A/P863A
BLOCK DIAGRAM
PRODUCT OVERVIEW
P0.0-P0.7/INT0-INT2 P2.0-P2.7
XIN
XOUT
PWM0
PWM6
Vsync-I
Hsync-I
Csync-I
Vsync-O
Hsync-O
Clamp-O
TM0CAP
RESET
INT0-INT2
Main
Osc
8-Bit
PWM
(7-Ch)
Sync-
Processor
8-Bit
Counter
(Timer M0)
Port 0
Port 2
I/O Port and Interrupt
Control
SAM8 CPU
32/48-
Kbyte
ROM
784/1040-
Byte
Register File
VDD1, VDD2
VSS1, VSS2
TEST
Port 1
P1.0-P1.2
Port 3
P3.0-P3.7
ADC
Slave
Only
IIC-Bus
AD0-AD3
SCL1
SDA1
* S3C8639
- 32 Kbyte ROM
- 784 Byte RAM
* S3C863A
- 48 Kbyte ROM
- 1040 Byte RAM
12-Bit
Counter
(Timer M1)
Interval
Timer
(Timer M2)
Multi-master IIC-Bus
and DDC1/2B/2Bi/2B+
SCL0
SDA0
Figure 1-1. Block Diagram
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PRODUCT OVERVIEW
PIN ASSIGNMENTS
S3C8639/C863A/P863A
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3
P0.4/TM0CAP
P0.5
P0.6
P0.7
P1.0/SDA1
P1.1/SCL1
VDD1
VSS1
XOUT
XIN
TEST (GND)
SDA0
SCL0
RESET
P1.2
P2.0/PWM0
P2.1/PWM1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
S3C8639
/C863A
(42-SDIP)
42 P3.7
41 P3.6
40 P3.5
39 P3.4
38 P3.3/AD3
37 P3.2/AD2
36 P3.1/AD1
35 P3.0/AD0
34 VDD2
33 VSS2
32 P2.7/Csync-I (SOG)
31 Hsync-I
30 Vsync-I
29 Vsync-O
28 Hsync-O
27 Clamp-O
26 P2.6/PWM6
25 P2.5/PWM5
24 P2.4/PWM4
23 P2.3/PWM3
22 P2.2/PWM2
NOTE: The TEST pin must connect to V SS (GND) in the normal operation mode.
Figure 1-2. S3C8639/C863A 42-SDIP Pin Assignment
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S3C8639/C863A/P863A
PRODUCT OVERVIEW
P0.5
P0.6
P0.7
P1.0/SDA1
P1.1/SCL1
VDD1
VSS1
XOUT
XIN
TEST (GND)
SDA0
1
2
3
4
5
6
7
8
9
10
11
S3C8639
/C863A
44-QFP
(Top View)
33 P3.2/AD2
32 P3.1/AD1
31 P3.0/AD0
30 VDD2
29 VSS2
28 P2.7/Csync-I (SOG)
27 Hsync-I
26 Vsync-I
25 Vsync-O
24 Hsync-O
23 Clamp-O
NOTE: The TEST pin must connect to V SS (GND) in the normal operation mode.
Figure 1-3. S3C8639/C863A 44-QFP Pin Assignment
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