S3P1860.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 S3P1860 데이타시트 다운로드

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1. S3C1840

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S3C1840
DESCRIPTION
S3C1840, a 4-bit single-chip CMOS microcontroller, consists of the reliable SMCS-51 CPU core with on-chip
ROM and RAM. Eight input pins and 11 output pins provide the flexibility for various I/O requirements. Auto reset
circuit generates reset pulse every certain period, and every halt mode termination time. The S3C1840
microcontroller has been designed for use in small system control applications that require a low-power, cost -
sensitive design solution. In addition, the S3C1840 has been optimized for remote control transmitter.
FEATURES
ROM Size
1,024 bytes
RAM Size
32 nibbles
Instruction Set
39 instructions
Instruction Cycle Time
13.2 µsec at fxx = 455 kHz
Four Transmission Frequencies
fxx/12 (1/4 duty), fxx/12 (1/3 duty), fxx/8 (1/2
duty), and no-carrier frequency
Supply Voltage
1.8 V-3.6 V (250 kHz fOSC 3.9 MHz)
2.2 V-3.6 V (3.9 MHz < fOSC 6 MHz)
Power Consumption
Halt mode: 1 µA (maxium)
Normal mode: 0.5 mA (typical)
Input Ports
Two 4-bit ports (24 pins)/one 4-bit port, one 2-bit
ports (20 pins)
Output Ports
One 4-bit port, seven 1-bit ports (24 pins)/one 4-
bit port, five1-bit ports (20 pins)
Built-in Oscillator
Crystal/ceramic resonator
Operating temperature
– 20 °C to 85 °C
Package Type
24 SOP, 20 DIP, 20 SOP
Oscillator Frequency divide select
Mask Option: fxx = fOSC or fOSC/8
Built-in Reset Circuit
Built-in Power-on reset and auto reset circuit for
generating reset pulse every 131072/fxx (288
ms at fxx = 455 kHz)
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S3C1840
BLOCK DIAGRAM
P2.1 - P2.6
6
Internal P2.13
P2-Output Latch
58
ROM
RAM
16 x 2 x 4-bits
16
L Decoder
2
4
H
ALU & A
4
4
1
L
4
4
PB
4
4 SF
P3 Output Register
(PR)
4
Internal
P2.0
Internal P2.9 and P2.10
fXX/8 (1/2)
fXX/12 (1/3)
fXX/12 (1/4)
No Carrier
64 x 16 x 8-bits
46
PA PC
3-Level Stack
MUX
4
4
4
DIV OSC
Auto Reset
HALT
Internal P2.12
P1.0 - P1.3
P0.0 - P0.3
P3.0 - P3.3
P2.0/REM
XI XO
Figure 1-1. Block diagram
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PIN CONFIGURATION (24 SOP)
S3C1840
VSS
XI
XO
P2.6
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P1.2
P1.3
1 24
2 23
3 22
4 21
5 20
6 S3C1840 19
7 18
8 17
9 16
10 15
11 14
12 13
VDD
P2.0/REM
TEST
P2.1
P2.2
P2.3
P2.4
P2.5
P3.0
P3.1
P3.2
P3.3
Figure 1-2. Pin Configuration (24 SOP)
Table 1-1. PIN Description for 24 PINS
Pin
Name
P0.0-P0.3
P1.0-P1.3
P2.0 REM
P2.2-P2.5
P2.1, P2.6
P3.0-P3.3
TEST
XI
XO
VDD
VSS
Pin
Number
5, 6, 7, 8
9, 10, 11, 12
23
20, 19, 18, 17
21, 4
16, 15, 14, 13
22
2
3
24
1
Pin
Type
Input
Input
Output
Output
Description
4-bit input port when P2.13 is low
4-bit input port when P2.13 is high
1-bit individual output for remote carrier
frequency (1)
1-bit individual output port
Output
Input
Input
Output
4-bit parallel output port
Input pin for test (Normally connected to VSS)
Oscillation clock input
Oscillation clock output
Power supply
Ground
I/O Circuit
Type
A
A
B
C
D
C
NOTES:
1. The carrier can be selected by software as fxx/12 (1/3 duty), fxx/12 (1/4 duty), fxx/8 (1/2 duty), or no-carrier
frequency.
2. Package type can be selected as 24 SOP in the ordering sheet.
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S3C1840
PIN CONFIGURATION (20 DIP, 20 SOP)
VSS
XI
XO
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P3.3
1 20
2 19
3 18
4 17
5 S3C1840 16
6 15
7 14
8 13
9 12
10 11
VDD
P2.0/REM
TEST
P2.1
P2.2
P2.3
P2.4
P3.0
P3.1
P3.2
Figure 1-3. Pin Configuration (20 DIP, 20 SOP)
Table 1-2. Pin Description for 20 Pins
Pin
Name
P0.0-P0.3
P1.0-P1.1
P2.0/REM
P2.2-P2.4
P2.1
P3.0-P3.3
TEST
XI
XO
VDD
VSS
Pin
Number
4, 5, 6, 7
8, 9
19
16, 15, 14
17
13, 12, 11, 10
18
2
3
20
1
Pin
Type
Input
Input
Output
Output
Description
4-bit input port when P2.13 is low
2-bit input port when P2.13 is high
1-bit individual output for remote carrier
frequency (1)
1-bit individual output port
Output
Input
Input
Output
4-bit parallel output port
Input pin for test (Normally connected to VSS)
Oscillation clock input
Oscillation clock output
Power supply
Ground
I/O Circuit
Type
A
A
B
C
D
C
NOTES:
1. The carrier can be selected by software as fxx/12 (1/3 duty), fxx/12 (1/4 duty), fxx/8 (1/2 duty), or no-carrier
frequency.
2 Package type can be selected as 20 DIP, or 20 SOP in the ordering sheet.
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