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S3C821A/P821A
1 PRODUCT OVERVIEW
PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLES
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Among the major CPU features are:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum of six CPU clocks) can be assigned to
specific interrupt levels.
S3C821A/P821A MICROCONTROLLER
The S3C821A/P821A single-chip CMOS
microcontroller is fabricated using the highly
advanced CMOS process, based on Samsung’s
newest CPU architecture.
The S3C821A is a microcontroller with a 48-Kbyte
mask-programmable ROM embedded.
The S3P821A is a microcontroller with a 48-Kbyte
one-time-programmable ROM embedded.
Using a proven modular design approach, Samsung
engineers have successfully developed the
S3C821A/P821A by integrating the following
peripheral modules with the powerful SAM8 core:
— Six programmable I/O ports, including five 8-bit
OTP
ports and one 7-bit port, for a total of 47 pins.
— Twelve bit-programmable pins for external
interrupts.
— One 8-bit basic timer for oscillation stabilization
and watchdog functions (system reset).
— One 8-bit timer/counter and one 16-bit
timer/counter with selectable operating modes.
— Watch timer for real time.
— 4-input A/D converter
— Serial I/O interface
The S3C821A/P821A is versatile microcontroller for
cordless phone, pager, etc. They are currently
available in 80-pin TQFP and 80-pin QFP package.
The S3P821A is an OTP (One Time Programmable) version of the S3C821A microcontroller. The S3P821A
microcontroller has an on-chip 48-Kbyte one-time-programmable EPROM instead of a masked ROM. The
S3P821A is comparable to the S3C821A, both in function and in pin configuration.
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PRODUCT OVERVIEW
S3C821A/P821A
FEATURES
CPU
• SAM8 CPU core
Memory
• Data memory: 1040-byte of internal register file
(Excluding LCD RAM)
• Program memory: 48-Kbyte internal program
memory (ROM)
External Interface
• 64-Kbyte external data memory area
Instruction Execution Time
• 750 ns at 8 MHz (minimum, Main oscillator)
• 183 µs at 32,768 Hz (minimum, Sub oscillator)
Interrupts
• 7 interrupt levels and 19 interrupt sources
• 19 vectors
• Fast interrupt processing feature (for one
selected interrupt level)
I/O Ports
• Five 8-bit I/O ports (P0–P4) and one 7-bit I/O
port (P5) for a total of 47 bit-programmable pins
8-Bit Basic Timer
• One programmable 8-bit basic timer (BT) for
oscillation stabilization control or watchdog timer
(software reset) function
Watch Timer
• Time internal generation: 3.91 ms, 0.5 s at
32,768 Hz
• Four frequency outputs to BUZ pin
• Clock source generation for LCD
Timers and Timer/Counters
• One 8-bit timer/counter (Timer 0) with three
operating modes: Interval, Capture, and PWM
• One 16-bit timer/counter (Timer 1) with two 8-bit
timer/counter modes
LCD Controller/Driver
• Up to 32 segment pins
• 3, 4, and 8 common selectable
• Choice of duty cycle
• All dots can be switched on/off
• Internal resistor circuit for LCD bias
Serial Port
• One synchronous SIO
A/D Converter
• 8-bit conversion resolution × 4 channel
• 34 µs conversion time (4 MHz CPU clock, fxx/4)
Oscillation Sources
• Crystal, ceramic, or RC for main system clock
• Crystal or external oscillator for subsystem clock
• Main system clock frequency: 8 MHz
• Subsystem clock frequency: 32.768 kHz
Power-down Modes
• Main idle mode (only CPU clock stops)
• Sub idle mode
• Stop mode (main/sub system oscillation stops)
Operating Temperature Range
• – 40 °C to + 85 °C
Operating Voltage Range
• 2.0 V to 5.5 V at 32 kHz (sub clock)-6 MHz
(main clock)
• 2.2 V to 5.5 V at 8 MHz
Package Type
• 80-pin TQFP, 80-pin QFP
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S3C821A/P821A
BLOCK DIAGRAM
PRODUCT OVERVIEW
P0.0-P0.7
P1.0-P1.7
P2.0-P2.7
RESET
XIN
XOUT
MAIN
OSC
XIN
XOUT
SUB
OSC
T1CK
TA
TB
TIMER 1
A and B
PORT 0
PORT 1
PORT 2
INTERNAL BUS
I/O PORT and INTERRUPT
CONTROL
PORT 3
SAM8 CPU
PORT 4
P3.0-P3.7
P4.0-P4.7
T0CK
T0/T0CAP/
T0PWM
TIMER 0
SCK
SI
SO
SIO
48-KB ROM
1-KBYTE
REGISTER
FILE
AVSS
AVREF
A/D
CONVERTER
VDD1 (INTERNAL)
VSS1 (INTERNAL)
VDD2 (EXTERNAL)
VSS2 (EXTERNAL)
WATCH
TIMER
ADC0 -ADC3
PORT 5
P5.0-P5.6
LCD
DRIVER
COM0-COM3
SEG0-SEG3/
COM4-COM7
SEG4-SEG31
VLC1
BUZ
Figure 1-1. S3C821A Simplified Block Diagram
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PRODUCT OVERVIEW
PIN ASSIGNMENTS
S3C821A/P821A
P1.1/SEG25/AD1
P1.2/SEG26/AD2
P1.3/SEG27/AD3
P1.4/SEG28/AD4
P1.5/SEG29/AD5
P1.6/SEG30/AD6
P1.7/SEG31/AD7
P2.0/AS
P2.1/DR
VDD1(INT)
VSS1
XOUT
XIN
TEST
XTIN
XTOUT
RESET
P2.2/DW
P2.3/DM
P2.4/INT0/T0CK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
S3C821A
(80-TQFP)
60 SEG4
59 SEG3/COM7
58 SEG2/COM6
57 SEG1/COM5
56 SEG0/COM4
55 COM3
54 COM2
53 COM1
52 COM0
51 VDD2 (EXT)
50 VSS2
49 VLC1
48 P5.6
47 P5.5
46 P5.4
45 P5.3/BUZ
44 P5.2/SO
43 P5.1/SI
42 P5.0/SCK
41 P4.7/INT11
Figure 1-2. S3C821A Pin Assignments (80-TQFP-1212)
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S3C821A/P821A
PRODUCT OVERVIEW
P0.7/SEG23/A15
P1.0/SEG24/AD0
P1.1/SEG25/AD1
P1.2/SEG26/AD2
P1.3/SEG27/AD3
P1.4/SEG28/AD4
P1.5/SEG29/AD5
P1.6/SEG30/AD6
P1.7/SEG31/AD7
P2.0/AS
P2.1/DR
VDD1(INT)
VSS1
XOUT
XIN
TEST
XTIN
XTOUT
RESET
P2.2/DW
P2.3/DM
P2.4/INT0/T0CK
P2.5/INT1/T1CK
P2.6/INT2/TA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
S3C821A
(80-QFP)
64 SEG6
63 SEG5
62 SEG4
61 SEG3/COM7
60 SEG2/COM6
59 SEG1/COM5
58 SEG0/COM4
57 COM3
56 COM2
55 COM1
54 COM0
53 VDD2 (EXT)
52 VSS2
51 VLC1
50 P5.6
49 P5.5
48 P5.4
47 P5.3/BUZ
46 P5.2/SO
45 P5.1/SI
44 P5.0/SCK
43 P4.7/INT11
42 P4.6/INT10
41 P4.5/INT9
Figure 1-3. S3C821A Pin Assignments (80-QFP-1420C)
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