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®
Data Sheet
February 2003
ISL6405
FN9026
Dual Output LNB Supply and Control
Voltage Regulator with I2C Interface for
Advanced Satellite Set-top Box Designs
The ISL6405 is a highly integrated voltage regulator and
interface IC, specifically designed for supplying power and
control signals from advanced satellite set-top box (STB)
modules to the low noise blocks (LNBs) of two antenna
ports. The device is comprised of two independent current-
mode boost PWMs and two low-noise linear regulators along
with the circuitry required for 22Khz tone generation,
modulation and I2C device interface. The device makes the
total LNB supply design simple, efficient and compact with
low external component count.
Two independent current-mode boost converters provide the
linear regulators with input voltages that are set to the final
output voltages, plus typically 1.2V to insure minimum power
dissipation across each linear regulator. This maintains
constant voltage drops across each linear pass element
while permitting adequate voltage range for tone injection.
The final regulated output voltages are available at two
output terminals to support simultaneous operation of two
antenna ports for dual tuners. The outputs for each PWM are
set to 13V or 18V by independent voltage select commands
(VSEL1, VSEL2) through the I2C bus. Additionally, to
compensate for the voltage drop in the coaxial cable, the
selected voltage may be increased by 1V with the line length
compensation (LLC) feature. All the functions on this IC are
controlled via the I2C bus by writing 8 bits on System
Register (SR, 8 bits). The same register can be read back,
and two bits will report the diagnostic status. Separate enable
commands sent on the I2C bus provide independent standby
mode control for each PWM and linear combination, disabling
the output into shutdown mode.
Each output channel is capable of providing 750mA of
continuous current. The overcurrent limit can be digitally
programmed The SEL18V pin with QFN package allows the
13V to 18V transition with an external pin, over-riding the I2C
input.
Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE
ISL6405EEB
ISL6405ER
-20 to 85
-20 to 85
28 LD EPSOIC
32 QFN
PKG. NO.
M28.3B
L32.5x5
Features
• Single Chip Power solution
- True Dual Operation for 2-Tuner / 2-Dish Applications
- Both Outputs May be Enabled Simultaneously at
Maximum Power
- Integrated DC-DC Converter and I2C Interface
• Switch-Mode Power Converter for Lowest Dissipation
- Boost PWMs with > 92% Efficiency
- Selectable 13V or 18V Outputs
- Digital Cable Length Compensation (1V)
• I2C Compatible Interface for Remote Device Control
- Registered Slave Address 0001 00XX
- Full 3.3V / 5V Operation up to 400kHz
• Built-In Tone Oscillator Factory Trimmed to 22kHz
- Facilitates DiSEqCTM (EUTELSAT) Encoding
• Internal Over-Temperature Protection and Diagnostics
• Internal Overload and Overtemp Flags (Visible on I2C)
• LNB Short-Circuit Protection and Diagnostics
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale Package Footprint
• External Pins to Select 13V / 18V Options
- Available with QFN Package Only
Applications
• LNB Power Supply and Control for Satellite Set-Top Box
References
Tech Brief 389 (TB389) - “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”; Available on
the Intersil website, www.intersil.com
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved

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ISL6405
ISL6405 (EPSOIC)
TOP VIEW
VSW2 1
28 VCC
COMP2 2
27 CPVOUT
FB2 3
26 CPSWIN
GATE2 4
25 CPSWOUT
PGND 2 5
24 TCAP2
CS2 6
23 DSQIN2
SGND 7 ISL6405EEB 22 VO2
BYPASS 8
21 AGND
PGND1 9
20 VO1
GATE1 10
19 DSQIN1
CS1 11
18 TCAP1
FB1 12
17 SCL
COMP1 13
16 ADDRESS
VSW1 14
15 SDA
ISL6405 (QFN)
TOP VIEW
32 31 30 29 28 27 26 25
PGND2 1
24 CPSWOUT
CS2 2
23 TCAP2
SGND 3
22 DSQIN2
SEL18V1 4
SEL18V2 5
ISL6405ER
21 VO2
20 AGND
BYP 6
19 VO1
PGND1 7
18 DSQIN1
GATE1 8
17 TCAP1
9 10 11 12 13 14 15 16
2

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Block Diagram
COUNTER
10 GATE1
OVERCURRENT
PROTECTION
LOGIC SCHEME 1
OLF1
DCL
PWM
LOGIC
Q
S
CLK1
OC1
PGND1
9
CS1
11
CS ILIM1
AMP
SLOPE
COMPENSATION
13 COMP1
FB1
12
VREF1
14 VSW1
20 VO1
15 16 17
OLF2
DCL
OVERCURRENT
PROTECTION
LOGIC SCHEME 2
COUNTER
OC2
SDA
ADDR SCL
ISEL1
EN1
ENT1
OTF
LLC1
OLF
I2C
INTERFACE
VSEL1
VSEL2
ISEL2
EN2
ENT2
DCL
LLC2
CLK2
PWM
LOGIC
Q
S
ILIM2 CS
AMP
SLOPE
COMPENSATION
GATE2
PGND2
CS2
BAND GAP
REF VOLTAGE
REF
VOLTAGE
ADJ1
BGV
CLK1
OSC. CLK2
220kHZ
÷ 10 &
WAVE SHAPING
TONE
INJ
CKT 1
22kHZ
TONE
TONE
INJ
CKT 2
BGV
REF
VOLTAGE
ADJ2
VREF2
COMP2
FB2
VSW2
4
5
6
2
3
1
+
VO2
22
+-
- ENT2
28 VCC
ON CHIP
LINEAR
UVLO
SGND
POR
7 SOFT-START
INT 5V
SOFT-START
EN1/EN2
8
ENT1
CPVOUT
27
OTF
THERMAL
SHUTDOWN
CPSWIN
CHARGE PUMP
CPSWOUT
26
21 18 19 23 24
25

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Typical Application Schematic
VIN = 8V TO 14V
+C3
D1
C1 + C2
L1
Q1
R1
VO1
13V / 18V
C15
C4
R2 C12
C5
C16
28 VCC
7 SGND
10 GATE1
11 CS1
9 PGND1
13 COMP1
12 FB1
14 VSW1
20 VO1
19 DSQIN1
23 DSQIN2
16 ADDRESS
18 TCAP1
21 AGND
TCAP2 24
BYPASS 8
GATE2 4
CS2 6
PGND2 5
COMP2 2
FB2 3
VSW2 1
VO2 22
SCL 17
SDA 15
CPSWIN 26
CPSWOUT 25
CPVOUT 27
ISL6405EEB C9
C20
C6
R3
C13
C8
+C14
R3
C7
L2
D2
Q2
+C10
C11
R4
SDA
SCL
VO2
13V / 18V
C17

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ISL6405
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 18.0V
Logic Input Voltage Range (SDA, SCL, ENT) . . . . . . . . -0.5V to 7V
Thermal Information
Thermal Resistance (Typical, Note 1, 2) θJA (oC/W) θJC (oC/W)
EPSOIC Package (Note 1, 2). . . . . . . .
29
4
QFN Package (Note 1, 2). . . . . . . . . . .
34
6
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . -40oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Operating Temperature range . . . . . . . . . . . . . . . . . . -20oC to 85oC
NOTE: The device junction temperature should be kept below
150oC. Thermal shut-down circuitry turns off the device if junction
temperature exceeds +150oC typically.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Vcc = 12V, TA = -20oC to +85oC, unless otherwise noted.Typical values are at TA = 25oC.EN1=EN2=H,
LLC1=LLC2=L, ENT1=ENT2=L, DCL=L, DSQIN1=DSQIN2=L, Iout = 12mA, unless otherwise noted. See
software description section for I2C access to the system.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Operating Supply Voltage Range
8 12 14
V
Standby Supply Current
EN1 = EN2 = L
-
1.5 3.0
mA
Supply Current
IIN EN1 = EN2 = LLC1 = LLC2 = VSEL1 =
VSEL2 = ENT1 = ENT2 = H, No Load
-
4.0 8.0
mA
UNDER VOLTAGE LOCKOUT
Start Threshold
7.5 - 7.95 V
Stop Threshold
7.0 - 7.55 V
Start to Stop Hysteresis
350 400 500
mV
SOFT START
COMP Rise Time (Note 3)
(Note 5)
- 1024 - Cycles
Output Voltage (Note 4)
Line Regulation
Load Regulation
Dynamic Output Current Limiting
VO1 VSEL1 = L, LLC1 = L
VO1 VSEL1 = L, LLC1 = H
VO1 VSEL1 = H, LLC1 = L
VO1 VSEL1 = H, LLC1 = H
VO2 VSEL2 = L, LLC2 = L
VO2 VSEL2 = L, LLC2 = H
VO2 VSEL2 = H, LLC2 = L
VO2 VSEL2 = H, LLC2 = H
DVO1,DVO2 VIN = 8V to 14V; VO1, VO2 = 13V
VIN = 8V to 14V; VO1, VO2 = 18V
DVO1,DVO2 IO = 12mA to 350mA
IO = 12mA to 750mA (Note 5)
IMAX DCL = L, ISEL1/2 = L
DCL = L, ISEL1/2 = H (Note 5)
12.74 13.0 13.26
13.72 14.0 14.28
17.64 18.0 18.36
18.62 19.0 19.38
12.74 13.0 13.26
13.72 14.0 14.28
17.64 18.0 18.36
18.62 19.0 19.38
- 4.0 40.0
- 4.0 60.0
- 50 80
- 100 200
425 - 550
775 850 950
V
V
V
V
V
V
V
V
mV
mV
mV
mV
mA
mA
Dynamic Overload Protection Off Time TOFF DCL = L, Output Shorted (Note 5)
- 900 -
ms
Dynamic Overload Protection On Time
TON
- 20 -
ms
22kHz TONE SECTION
Tone Frequency
Tone Amplitude
Tone Duty Cycle
Tone Rise or Fall Time
Linear Regulator
ftone
Vtone
dctone
Tr, Tf
ENT1/2 = H
ENT1/2 = H
ENT1/2 = H
ENT1/2 = H
20.0 22.0 24.0
550 680 900
40 50 60
5 8 14
kHz
mV
%
µs
Drop-out Voltage
Iout = 750mA (Note 5)
1.2 V
5