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®
Data Sheet
November 2003
ISL6421
FN9130
Single Output LNB Supply and Control
Voltage Regulator with I2C Interface for
Advanced Satellite Set-top Box Designs
The ISL6421 is a highly integrated solution for supplying
power and control signals from advanced satellite set-top
box (STB) modules to the low noise block (LNB). This device
is comprised of a current-mode boost PWM and a low-noise
linear regulator, along with the circuitry required for I2C
device interfacing and for providing DiSEqCTM standard
control signals to the LNB.
A regulated output voltage is available at the output terminal
(VOUT) to support the operation of the antenna port in
advanced satellite STB applications. The regulated output
may be set to either 13V or 18V by use of the voltage select
command (VSEL) through the I2C bus. Additionally, to
compensate for the voltage drop in the coaxial cable, the
voltage may be increased by 1V with the line length
compensation (LLC) feature. An enable command sent on
the I2C bus provides standby mode control for the PWM and
linear combination, disabling the output to conserve power.
A current-mode boost converter provides the linear regulator
with an input voltage that is set to the required output
voltage, plus 1.2V (typ.) to insure minimum power
dissipation. This maintains a constant voltage drop across
the linear pass element, while permitting an adequate
voltage range for tone injection.
The device is capable of providing 450mA (typ.).
Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE
PKG.
DWG. #
ISL6421ER
-20 to 85 32 Ld 5x5 QFN L32.5x5
Features
• Switch-Mode Power Converter for Lowest Dissipation
- Boost PWM with >92% Efficiency
- Selectable 13V or 18V Outputs
- Digital Cable Length Compensation (1V)
• External Pin to Select 13V/18V Options
• I2C Compatible Interface for Remote Device Control
- Registered Slave Address 0001 00XX
- Fully Functional 3.3V, 5V Operation up to 400kHz
• Built-In Tone Oscillator Factory Trimmed to 22kHz
- Facilitates DiSEqC (EUTELSAT) Encoding
• Internal Over-Temperature Protection and Diagnostics
• Internal Overload and Overtemp Flags (Visible on I2C)
• LNB Short-Circuit Protection and Diagnostics
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale Package Footprint
Applications
• LNB Power Supply and Control for Satellite Set-Top Box
References
• Tech Brief 389 (TB389) - “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”; Available
on the Intersil website, www.intersil.com
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved

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Pinout
ISL6421
ISL6421ER (32 LEAD 5X5 QFN)
TOP VIEW
32 31 30 29 28 27 26 25
PGND 1
24 CPSWOUT
NC 2
23 NC
SGND 3
22 NC
SEL18V 4
21 NC
NC 5
20 AGND
BYPASS 6
19 VOUT
PGND 7
18 DSQIN
GATE 8
17 TCAP
9 10 11 12 13 14 15 16
Typical Application Schematic
VIN = 8V TO 14V
+ C3
56µF
L1
33µH
D1
C1
1µF
+ C2
56µF
STPS2L40U
C4
1µF
Q1
FDS6612A
R2
C11
R1
0.1
R3
C5
C6
VOUT
C10
ISL6421
VCC
SGND
GATE
CS
PGND
COMP
FB
VSW
VOUT
TCAP
SEL18V
DSQIN
ADDR
SDA
SCL
CPSWIN
CPSWOUT
CPVOUT
BYPASS
AGND
C11
C7
C8 C9
2

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Block Diagram
COUNTER
OVERCURRENT
PROTECTION
LOGIC SCHEME 1
OLF
DCL
SEL18V
GATE
PGND
PWM
LOGIC
Q
S
CLK
OC
CS
COMP
CS ILIM
AMP
SLOPE
COMPENSATION
FB
VREF
VSW
BAND GAP
REF VOLTAGE
REF
VOLTAGE
ADJ
ISEL
EN
ENT
OLF
I2C
INTERFACE
SDA
ADDR
SCL
OTF
LLC VSEL
DCL
CLK OSC.
220kHz
BGV
÷ 10 AND
WAVE SHAPING
TONE
INJ
CKT
22kHz
TONE
VOUT
VCC
SGND
ON CHIP
LINEAR
UVLO
POR
SOFT-START
INT 5V
SOFT-START
EN
+-
OTF
THERMAL
SHUTDOWN
CPVOUT
CHARGE PUMP CPSWIN
CPSWOUT
SDA
ADDR
SCL
ENT
DSQIN

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ISL6421
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 18.0V
Logic Input Voltage Range (SDA, SCL, ENT) . . . . . . . . -0.5V to 7V
Output Current . . . . . . . . . . . . . . . . . . . . Externally/Internally Limited
Thermal Information
Thermal Resistance
θJA (oC/W) θJC (oC/W)
QFN Package (Notes 1, 2). . . . . . . . . .
32
4
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -40oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
NOTE: The device junction temperature should be kept below
150oC. Thermal shut-down circuitry turns off the device if junction
temperature exceeds +150oC typically.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the “case temperature” location is the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
VCC
ENT
=
=
12V, TA = -20oC to
L, DCL = L, DSQIN
+85oC, unless otherwise noted. Typical values are at TA = 25oC. EN
= L, IOUT = 12mA, unless otherwise noted. See software description
= H, LLC = L,
section for I2C
access to the system.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Operating Supply Voltage Range
8 12 14
V
Standby Supply Current
EN = L
-
1.5 3.0
mA
Supply Current
UNDER VOLTAGE LOCKOUT
IIN EN = LLC = VSEL = ENT = H, No Load
-
4.0 8.0
mA
Start Threshold
7.5 - 7.95 V
Stop Threshold
7.0 - 7.55 V
Start to Stop Hysteresis
350 400 500
mV
SOFT START
COMP Rise Time (Note 2)
(Note 4)
- 1024 - Cycles
OUTPUT VOLTAGE
Output Voltage (Note 3)
Line Regulation
Load Regulation
Dynamic Output Current Limiting
Dynamic Overload Protection Off Time
VOUT
VOUT
VOUT
VOOU
DVOUT
DVOUT
IMAX
TOFF
VSEL = L, LLC = L
VSEL = L, LLC = H
VSEL = H, LLC = L
VSEL = H, LLC = H
VIN = 8V to 14V; VOUT = 13V
VIN = 8V to 14V; VOUT = 18V
IO = 12mA to 450mA
DCL = L
DCL = L, Output Shorted (Note 4)
12.74 13.0 13.26
13.72 14.0 14.28
17.64 18.0 18.36
18.62 19.0 19.38
- 4.0 40.0
- 4.0 60.0
- 50 80
575 - 950
- 900 -
V
V
V
V
mV
mV
mV
mA
ms
Dynamic Overload Protection On Time
TON
- 20 -
ms
22kHz TONE
Tone Frequency
Tone Amplitude
Tone Duty Cycle
Tone Rise or Fall Time
ftone
Vtone
dctone
Tr, Tf
ENT = H
ENT = H
ENT = H
ENT = H
20.0 22.0 24.0
550 680 900
40 50 60
5 8 14
kHz
mV
%
µs
4

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ISL6421
Electrical Specifications
VCC
ENT
=
=
12V, TA = -20oC to
L, DCL = L, DSQIN
+85oC, unless otherwise noted. Typical values are at TA = 25oC. EN
= L, IOUT = 12mA, unless otherwise noted. See software description
= H, LLC = L,
section for I2C
access to the system. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
LINEAR REGULATOR
Drop-out Voltage
Iout = 450mA (Note 4)
- 1.2 -
V
DSQIN PIN
DSQIN pin logic Low
-
- 1.5V
V
DSQIN pin Logic HIGH
3.5 -
-
V
DSQIN pin Input Current
- 1 - µA
CURRENT SENSE
Current Limiting Threshold (max. input)
150 200 250
mV
Input Bias Current
Over Current Threshold
IBIAS
Static current mode, DCL = H
- 700 -
325 400 500
nA
mV
ERROR AMPLIFIER
Open Loop Voltage Gain
Gain Bandwidth Product
PWM
AOL (Note 4)
GBP (Note 4)
70 88
-
dB
10 -
- MHz
Maximum Duty Cycle
90 93
-
%
Minimum Pulse Width
(Note 4)
- 20 -
ns
OSCILLATOR
Oscillator Frequency
THERMAL PROTECTION
fo Fixed at (10)(ftone)
200 220 240
kHz
Thermal Shutdown
Temperature Shutdown Threshold
(Note 4)
- 150 -
Temperature Shutdown Hysteresis
(Note 4)
- 20 -
NOTES:
3. Internal Digital Soft-start
4. Voltage programming signals VSEL and LLC are implemented via the I2C bus.
IO = 450mA.
5. Guaranteed by Design.
5