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TM
Data Sheet
ISL6432
June 2001
File Number 9019
PWM and Triple Linear Power Controller
for Home Gateway Applications
The ISL6432 provides the power control and protection for
four output voltages for use with high-performance
microprocessor and embedded controller based
communications chip sets. The IC integrates a voltage-mode
PWM controller and three linear controllers, as well as
monitoring and protection functions into a 16-lead SOIC
package. The PWM controller is intended to regulate the
microprocessor memory core voltage with a synchronous-
rectified buck converter. The linear controllers can be
configured to generate DSP power, as well as upstream and
downstream voltages. Both the switching regulator and
linear voltage references provide ±2% of static regulation
over line, load, and temperature ranges. All outputs are user-
adjustable by means of an external resistor divider. All linear
controllers employ bipolar NPNs for the pass transistors.
The ISL6432 monitors all the output voltages. The PWM
controller’s adjustable overcurrent function monitors the
output current by using the voltage drop across the upper
MOSFET’s rDS(ON). The linear regulator outputs are
monitored via the FB pins for undervoltage events.
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
PKG.
NO.
ISL6432CB
0 to 70
16 Ld SOIC M16.15
ISL6432EVAL1 Evaluation Board
Applications
Low-Power Distributed DC-DC Conversion
Cable Modem and DSL Modem Power Regulation
• High Performance Memory Applications
Features
• Provides 4 Regulated Voltages
- Memory Core, Embedded Controller/DSP, Tuner
• Drives Bipolar Linear Pass Transistors
• Externally Resistor-Adjustable Outputs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- All Outputs: ±2% Over Temperature
• Overcurrent Fault Monitors
- Switching Regulator Does Not Require Extra Current
Sensing Element, Uses MOSFET’s rDS(ON)
• Small Converter Size
- 300kHz Constant Frequency Operation
- Small External Component Count
• ACPI Compatible
• Voltage Sequencing
Pinout
ISL6432 (SOIC)
TOP VIEW
DRIVE2 1
FB2 2
FB 3
COMP 4
GND 5
PHASE 6
BOOT 7
UGATE 8
16 FB3
15 DRIVE3
14 FB4
13 DRIVE4
12 OCSET
11 VCC
10 LGATE
9 PGND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved

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Block Diagram
FB3
DRIVE3
DRIVE4
VCC
EA3
-
+
EA4
+
-
x 0.70
FB4
DRIVE2
FB2
0.8V
+
-
INHIBIT/SOFT-START
EA2
UV3
+
-
UV4
UV2
GND
OSCILLATOR
OCSET
VCC
40µA
POWER-ON
RESET (POR)
SOFT-
START
AND FAULT
LOGIC
+
-
EA1
++
--
OCC
+
-
COMP1
PWM
FB COMP
DRIVE1
GATE
CONTROL
BOOT
UGATE
PHASE
VCC
SYNC
DRIVE
LGATE
PGND

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Simplified Power System Diagram
+5V
+3.3V
VOUT2
+
Q3
VOUT3
Q4
+
ISL6432
LINEAR
CONTROLLER
PWM
CONTROLLER
ISL6432
LINEAR
CONTROLLER
LINEAR
CONTROLLER
Q1
VOUT1
+
Q2
Q5
+
VOUT4
Typical Application
+5V
+3.3VIN
VOUT2
2.5V
+3.3VDUAL
VOUT3
1.8V
+
COUT3
Q3
+
COUT2
Rs2
DRIVE2
FB2
Rp2
Q4 DRIVE3
FB3
Rs3
Rp3
VCC
BOOT
OCSET
UGATE
PHASE
ISL6432
LGATE
PGND
FB
COMP
CBOOT
Q1
LOUT1
+
Q2 COUT1
CR1
VOUT1
2.5V
Rs1
VOUT4
1.5V
Q5
+
COUT4
DRIVE4
Rs4
Rp4
FB4
GND
Rp1
3

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ISL6432
Absolute Maximum Ratings
UGATE, BOOT . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to 15V
VCC, PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to +7V
DRIVE, LGATE, All Other Pins. . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply Voltage on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 fordetails.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Nominal Supply Current
ICC UGATE, LGATE, DRIVE2, DRIVE3, and
DRIVE4 Open
-5-
mA
POWER-ON RESET
Rising VCC Threshold
4.25 -
4.5
V
Falling VCC Threshold
3.75 -
4.0
V
OSCILLATOR AND SOFT-START
Free Running Frequency
Ramp Amplitude
Soft-Start Interval
REFERENCE VOLTAGE
FOSC
VOSC
TSS
275
-
6.25
300
1.5
6.83
325
-
7.40
kHz
VP-P
ms
Reference Voltage (All Regulators)
All Outputs Voltage Regulation
VREF
- 0.800 -
-2.0 - +2.0
V
%
LINEAR REGULATORS (OUT2, OUT3, AND OUT4)
Output Drive Current (All Linears)
VCC > 4.5V
100 120
-
mA
Undervoltage Level (VFB/VREF)
VUV
SYNCHRONOUS PWM CONTROLLER ERROR AMPLIFIER
- 70 -
%
DC Gain
- 80 -
dB
Gain-Bandwidth Product
GBWP
15 - - MHz
Slew Rate
SR COMP = 10pF
- 6 - V/µs
PWM CONTROLLER GATE DRIVERS
UGATE Source
UGATE Sink
LGATE Source
LGATE Sink
PROTECTION
IUGATE
IUGATE
ILGATE
ILGATE
VCC = 5V, VUGATE = 2.5V
VUGATE-PHASE = 2.5V
VCC = 5V, VLGATE = 2.5V
VLGATE = 2.5V
- -1 -
-1-
- -1 -
-2-
A
A
A
A
OCSET Current Source
IOCSET
34 40 46
µA
4

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ISL6432
Functional Pin Descriptions
VCC (Pin 11)
Provide a well decoupled 5V bias supply for the IC to this
pin. This pin also provides the gate bias charge for the lower
MOSFET controlled by the PWM section of the IC, as well as
the base current drive for the linear regulatorsexternal
bipolar transistors. The voltage at this pin is monitored for
Power-On Reset (POR) purposes.
GND (Pin 5)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PGND (Pin 9)
This is the power ground connection. Tie the synchronous
PWM converters lower MOSFET source to this pin.
BOOT (Pin 7)
Connect a suitable capacitor (0.47µF recommended) from
this pin to PHASE. This bootstrap capacitor supplies UGATE
driver the energy necessary to turn and hold the upper
MOSFET on.
OCSET (Pin 12)
Connect a resistor from this pin to the drain of the upper
PWM MOSFET. This resistor, an internal 40µA current
source (typical), and the upper MOSFETs on-resistance set
the converter overcurrent trip point. An overcurrent trip
cycles the soft-start function.
The voltage at this pin is monitored for power-on reset (POR)
purposes and pulling this pin below 1.25V with an open
drain/collector device will shutdown the switching controller.
PHASE (Pin 6)
Connect the PHASE pin to the PWM converters upper
MOSFET source. This pin is used to monitor the voltage
drop across the upper MOSFET for overcurrent protection.
UGATE (Pin 8)
Connect UGATE pin to the PWM converters upper MOSFET
gate. This pin provides the gate drive for the upper MOSFET.
LGATE (Pin 10)
Connect LGATE to the PWM converters lower MOSFET
gate. This pin provides the gate drive for the lower MOSFET.
COMP and FB (Pins 4, 3)
COMP and FB are the available external pins of the PWM
converter error amplifier. The FB pin is the inverting input of the
error amplifier. Similarly, the COMP pin is the error amplifier
output. These pins are used to compensate the voltage-mode
control feedback loop of the synchronous PWM converter.
DRIVE2, 3, 4 (Pins 1, 15, 13)
Connect these pins to the base terminals of external bipolar
NPN transistors. These pins provide the base current drive
for the regulator pass transistors.
FB2, 3, 4 (Pins 2, 16, 14)
Connect the output of the corresponding linear regulators to
these pins through properly sized resistor dividers. The
voltage at these pins is regulated to 0.8V. These pins are
also monitored for undervoltage events.
Quickly pulling and holding any of these pins above 1.25V
(using diode-coupled logic devices) shuts off the respective
regulators. Releasing these pins from the pull-up voltage
initiates a soft-start sequence on the respective regulator.
Description
Operation
The ISL6432 monitors and precisely controls 4 output
voltage levels (Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic). The IC has a
synchronous PWM controller and three linear controllers.
The PWM controller drives 2 MOSFETs (Q1 and Q2) in a
synchronous-rectified buck converter configuration and
regulates the output voltage to a level programmed by a
resistor divider. The linear controllers are designed to
regulate three more of the communication chip set
voltages. All linear controllers are designed to employ
external NPN bipolar pass transistors.
Initialization
The ISL6432 automatically initializes upon receipt of input
power. Special sequencing of the input supplies is not
necessary. The Power-On Reset (POR) function continually
monitors the input bias supply voltage. The POR monitors
the bias voltage at the VCC pin. The POR function initiates
soft-start operation after the bias supply voltage exceeds its
POR threshold.
Soft-Start
The POR function initiates the soft-start sequence. The
PWM error amplifier reference input is clamped to a level
proportional to the soft-start voltage. As the soft-start voltage
slews up, the PWM comparator generates PHASE pulses of
increasing width that charge the output capacitor(s).
Similarly, all linear regulatorsreference inputs are clamped
to a voltage proportional to the soft-start voltage. The ramp-
up of the internal soft-start function provides a controlled
output voltage rise.
Overcurrent Protection
All outputs are protected against excessive overcurrents.
The PWM controller uses the upper MOSFETs
on-resistance, rDS(ON) to monitor the current for protection
against shorted output. All linear controllers monitor their
respective FB pins for undervoltage events to protect against
excessive currents.
A sustained overload (undervoltage on linears or overcurrent
on the PWM) on any output results in an independent
shutdown of the respective output, followed by subsequent
individual re-start attempts performed at an interval equivalent
to 3 soft-start intervals. Figure 1 describes the protection
feature. At time T0, an overcurrent event sensed across the
switching regulators upper MOSFET (rDS(ON) sensing)
triggers a shutdown of the VOUT1 output. As a result, its
internal soft-start initiates a number of soft-start cycles. After a
5